Other

Presidio Components. Inc.

Daniel Devoe

Alan D Devoe

Lambert T Devoe

Hung Van Trinh

A capacitor device mountable on a plane of a substrate includes an electrically conductive bottom plate adapted to be mounted substantially parallel to, and in electrical contact at the plane of the substrate and a first multilayer capacitor having substantially parallel first and second electrode plates oriented substantially perpendicular to the bottom plate with the first electrode plates being electrically connected to the bottom plate. An electrically conductive top lead frame overlaps with, and is electrically isolated from, the bottom plate. The top lead frame electrically connected to the second electrode plates and adapted to be electrically connected at the plane of the substrate. The bottom lead frame may have a corrugated shape, where the corrugated shape provides compliance between the first multilayer capacitor and the substrate. A portion of the top lead frame may contact at least a portion of a side of the first multilayer capacitor.

Stacked multilayer capacitor

A capacitor device, which is mountable on a substrate, has an electrically conductive bottom lead frame with a bottom plate mountable substantially parallel to, and in contact with, the substrate and an electrically conductive top lead frame having a top plate spaced apart from the bottom plate and a first transition portion having a first end connected to the top plate and a second end, opposite the first end, electrically connectable to the substrate. Multilayer capacitors are mounted between the top plate and the bottom plate. The capacitors have opposed end terminations electrically connected to the top and bottom plates, such that internal electrode plates are substantially nonparallel to the substrate.

A monolithic capacitor structure includes opposed and overlapping plates within a dielectric body, which are arranged to form a lower frequency, higher value capacitor. Other conductive structure is located either inside the dielectric body or on an external surface thereof and is effective to form a higher frequency, lower value capacitor in parallel with the lower frequency, higher value capacitor. The resulting array of combined series and parallel capacitors integral with the dielectric body provides effective wideband performance in an integrated, cost-effective structure.

Integrated broadband ceramic capacitor array

A substrate includes a single-layer capacitor and various external contacts. A first external contact provides a first electrical connection to the single-layer capacitor. A second external contact provides a second electrical connection to the single-layer capacitor. The first and third external contacts are electrically connectable to another electrical component, and internal metallization structures or vias of conductive material electrically connect the second contact and the third contact to facilitate the single-layer capacitor being connectable in a parallel circuit with the other electrical component.

Combined multilayer and single-layer capacitor for wirebonding

A single layer ceramic capacitor for wire bonding or solder or epoxy attachment wherein a bottom metallization is of a lesser purity than a top metallization whereby the bottom metallization may be effectively soldered without leaching of the metal and the top metallization may be wire bonded. In an exemplary embodiment, the top metallization is essentially pure gold and the bottom metallization is an alloy of gold and platinum and/or palladium. The top and bottom metallizations are provided on a dielectric body that advantageously comprises a ceramic having a sintering temperature below the melting point of gold. In a further exemplary embodiment, the capacitance of the capacitor may be enhanced by providing one or more interior metallization planes parallel to the exterior metallizations and connected thereto by conductive vias.

Single layer capacitor with dissimilar metallizations

A high voltage capacitor has a monolithic body made of layers of dielectric material and further has first and second external contacts located on the body. First and second nonoverlapping electrodes electrically connected to the respective first and second contacts are located on respective first and second layers of dielectric material within the body. A floating electrode not connected to either of the contacts is located on a different, third layer of dielectric material. The floating electrode overlaps the first and second electrodes and forms two serially connected capacitors therewith.

Capacitor with high voltage breakdown threshold

A capacitor including at least one interior metallization plane or plate and a multiplicity of vias for forming multiple redundant electrical connections within the capacitor. Series capacitors are provided having at least two interior plates redundantly electrically connected to at least two respective exterior plates. R-C devices are provided having multiple redundant vias filled with resistor material and/or conductor material to provide a resistor either in series with or parallel to a capacitor. Capacitors and R-C devices are provided having end terminations for applying voltage differential. Further, a method for making single capacitors, multiple parallel array capacitors, series capacitors and R-C devices is provided in which the chips are formed from the bottom up.

CERAMIC CHIP CAPACITOR OF CONVENTIONAL VOLUME AND EXTERNAL FORM HAVING INCREASED CAPACITANCE FROM USE OF CLOSELY SPACED INTERIOR CONDUCTIVE PLANES RELIABLY CONNECTING TO POSITIONALLY TOLERANT EXTERIOR PADS THROUGH MULTIPLE REDUNDANT VIAS

A high power resistor device and method for making a high power resistor device. A resistor is formed on a first end of a fired, ceramic chip with multiple internal conductor electrodes, and end terminations are then applied to both ends of the chip. A power resistor device having a high power rating is thus provided having buried conductor electrodes electrically connected to end terminations, where the connection at the first end is through the resistor to form a power resistor structured to dissipate heat efficiently. In an alternative method of the present invention, both ends of the chip may be dipped in resistor paste to form resistors on both ends of the chip. In yet another alternative method of the present invention, a conductor under-layer is formed under the resistor, such as by first dipping the end of the chip in a conductor paste and firing the chip.

Power resistor and method for making

A feed-through capacitor has layers of dielectric material and a first hole that passes through the layers of dielectric material for receiving an electrical conductor connected to the filter capacitor. First, second and third electrodes are disposed between layers of the dielectric material and extend in a first direction substantially perpendicular to a centerline of the first hole. The third electrodes are disposed intermediate the first and second electrodes. Any one of the first, second and third electrodes is non-overlapping with any of another of the first, second and third electrodes in a direction substantially parallel to the centerline of the first hole. A filtering capacitor is formed substantially wholly by fringe-effect capacitance between the first and third electrodes, and a coupling capacitor is formed substantially wholly by fringe-effect capacitance between the second and third electrodes. The filtering and coupling are electrically connected in series.

Feed-through filter capacitor with non-overlapping electrodes

A monolithic capacitor structure includes at least first and second plates internal to a dielectric body, the plates extending inward from opposed conductive contacts on surfaces of the body, and forming capacitor(s) therebetween. A third plate extends within said body, electrically floating relative to the exterior contacts, and forming a capacitor with the first and second plates, and further forming a capacitor with additional conductive structures connected to the conductive contacts on the body. The resulting array of combined series and parallel capacitors formed by the third plate, in conjunction with the capacitor(s) formed by the first and second plates, provides effective wideband performance in an integrated, cost-effective structure.

The size and placement of internal metallization areas as do collectively form each of two electrodes is improved in a typically discoidal feed-through ceramic filter capacitor having (i) multiple ceramic layers, (ii) a hole passing a wire that carries electrical signals which are to be filtered, (iii) metal lining the hole so as to make electrical contact with the wire, and (iv) an exterior metal band connected to ground. First internal metallization areas, each in the shape of a relatively smaller small-aperture disk, are centered about the body's hole in contact with the metal lining, each area being upon one of the body's multiple ceramic layers, the areas collectively serving as a first electrode of the capacitor. Second internal metallization areas, each in the shape of a relatively larger large-apertured disk also centered about the hole and upon one of the ceramic layers, make at their exterior edge surface electrical contact with the metal band, thereby to serve as a second electrode of the capacitor. The respective metallization areas of each electrode are both (i) spaced far apart by previous standards, and, preferably, (ii) are located upon alternating ceramic layers, making that any voltage breakdown path is necessarily both (i) long and with (ii) both radial and longitudinal components. According to this long path, the breakdown voltage is high, typically 3000-4000 volts, making the capacitor suitable for, inter alia, implanted cardiac defibrillators.

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San Diego, CA, United States of America

Daniel Devoe