Intel Corporation

Daniel D Lederman

Efraim Rotem

Eliezer Weissmann

Yoni Aizik

Hisham Abu Salah

Nir Rosenzweig

Esfir Natanzon

Hisham Abu-Salah

Yevgeni Sabin

Shay Levy

Eliezer Weissman

Levy Shay

In one embodiment, processor includes a first core to execute instructions, and a power controller to control power consumption of the processor. The power controller may include a hardware performance state controller to control a performance state of the first core autonomously to an operating system, and calculate a target operating frequency for the performance state based at least in part on an energy performance preference hint received from the operating system. Other embodiments are described and claimed.

System, apparatus and method for responsive autonomous hardware performance state control of a processor

In an embodiment, a processor for demotion includes a plurality of cores to execute instructions and a demotion control circuit. The demotion control circuit is to: for each core of the plurality of cores, determine an average count of power state break events in the core; determine a sum of the average counts of the plurality of cores; determine whether the average count of a first core exceeds a first demotion threshold; determine whether the sum of the average counts of the plurality of cores exceeds a second demotion threshold; and in response to a determination that the average count of the first core exceeds the first demotion threshold and the sum of the average counts exceeds the second demotion threshold, perform a power state demotion of the first core. Other embodiments are described and claimed.

Controlling power state demotion in a processor

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Karmiel, Israel

Daniel D Lederman