Ciena Corporation

Daniel Claude Perras

Sebastien Gareau

David James Evans

John Andrew Earl

David G Stuart

Bashar Abdullah

Michael Watford

Xiaojin Liu

Tim Norman

A network element includes a port; and a device with circuitry configured to encode data for communication to a second device via a plurality of physical channels, and utilize one of the plurality of physical channels as a dedicated timing channel with encoding thereon different from encoding on the other plurality of physical channels, and interface encoded data via the plurality of physical channels with the port for transmission and reception with a second device.

Tolerant PCS for accurate timestamping in disaggregated network elements and synchronization method

A system includes a first module with a first clock; a second module with a second clock; and an Ethernet network interconnecting the first module and the second module by N Ethernet paths, N&#x2265;2; wherein the first module is configured to provide timestamps encapsulated in replicated Ethernet packets to the second module over each of the N Ethernet paths for redundancy. The first module can be configured to obtain timestamps from a first clock with each timestamp having a sequence identifier, replicate each timestamp and its sequence identifier, and encapsulate each replicated timestamp and its sequence identifier in an Ethernet packet and transmit each Ethernet packet over one of the N Ethernet paths. The second module can be configured to receive Ethernet packets over the N Ethernet paths; and utilize a first Ethernet packet with a given sequence identifier for synchronization of the second clock with the first clock.

Hitless protection for packet based digitized clock distribution

An optical module for use in an optical system is disclosed, the optical module implementing Precision Time Protocol (PTP) clock functionality therein. The optical module includes an electrical interface with the optical system; circuitry connected to the electrical interface and configured to implement a plurality of functions of functionality; an optical interface connected to the circuitry; and timing circuitry connected to the electrical interface and one or more of the plurality of functions, wherein the timing circuitry is configured to implement the PTP clock functionality.

Systems and methods for precise time synchronization with optical modules

A method, at an egress node, includes synchronizing with a global reference time; receiving a signal including a presentation time for when a specific part of the signal is to be transmitted, wherein the presentation time was determined by the ingress node with reference to the global reference time; determining an actual transmission time when the specific part of the signal is transmitted; and causing adjustment of a clock based on a time error derived from a difference between the presentation time and the actual transmission time.

Differential clock recovery using a global reference time

A distributed Precision Time Protocol (PTP) Transparent Clock (TC) provides a TC function based on overall residence time in a network at a server layer. That is, the server layer operates as a distributed TC for a corresponding client layer. A transport network includes a first node connected to a first client device; and a second node connected to a second client device over a server layer, wherein the first client device communicates to the second client device via a client layer, wherein the first node and the second node are synchronized to one another, and wherein the first node and the second node are configured to implement a distributed transparent clock on a PTP packet at the client layer, the distributed transparent clock includes a correction field in the PTP packet based on a residence time in the transport network at the server layer.

Distributed precision time protocol transparent clock

Virtualized Synchronous Ethernet systems and methods include, in a network element supporting a plurality of slices over a common Ethernet physical (PHY) connection, determining a common PHY frequency; for a specific slice of the plurality of slices, obtaining a bit-level accurate count (C) over a accumulation window; and determining a client clock for the specific slice based on the common PHY frequency and the bit-level accurate count (C). The systems and methods can include receiving the bit-level accurate count (C) from a second network element for synchronization therewith. The bit-level accurate count (C) over the given accumulation window can be determined utilizing accumulators and the client clock can be determined utilizing Digital Phase Lock Loops (DPLLs).

Virtualized synchronous Ethernet interfaces

Systems and methods of compensating for the delay asymmetry of coherent optical modems in a packet optical network include measuring fill levels of one or more queues each including an elastic First-In-First-Out (FIFO) circuit used in a transport mapping scheme, wherein the transport mapping scheme is one or more of client mapping to Optical Transport Unit (OTU) and OTU mapping to Flexible OTN (FlexO); and performing adjustments in a clock based in part on the measured fill levels, wherein the adjustments are configured to reduce a Time Error (TE) in the packet network based on delay asymmetry between two nodes.

Systems and methods for compensating coherent optics delay asymmetry in a packet optical network

An optical system supporting timing synchronization, alignment and deskewing across optical modules includes a plurality of optical devices each providing an Optical Tributary Signal (OTSi) which are part of an Optical Tributary Signal Group (OTSiG); and a management communication mechanism between the plurality of optical devices, wherein each of the plurality of optical devices are timing synchronized using the management communication mechanism and Precision Time Protocol (PTP) messaging. Each of the plurality of optical devices can include delay circuitry configured to deskew an associated OTSi with respect to other OTSi signals in the OTSiG.

Precise time synchronization across optical modules for group alignment

An optical module for use in an optical system, the optical module implementing Precision Time Protocol (PTP) clock functionality therein. The optical module includes an electrical interface with the optical system; circuitry connected to the electrical interface and configured to implement a plurality of functions of functionality; an optical interface connected to the circuitry; and timing circuitry connected to the electrical interface and one or more of the plurality of functions, wherein the timing circuitry is configured to implement the PTP clock functionality.

Systems and methods for the relative phase measurement and alignment of 66B encoded signals include receiving a plurality of 66B encoded signals each comprising sync headers which are periodically converted, determining a phase of each of the plurality of 66B encoded signals based on the periodically converted sync headers, and aligning the phase of each of the plurality of 66B encoded signals based on the determining. The periodically converted sync headers can include changing one of a first bit and a second bit of the sync header. A period of the periodically converted sync header can be set at twice a phase difference which is compensated at an egress point of the plurality of 66B encoded signals.

Systems and methods for relative phase measurement and alignment of 66B encoded signals

A precision time transfer method, in a first node that communicates with a second node, to determine a difference in time between the first node and the second node, the precision time transfer method includes receiving a departure time, T, from the second node, wherein the departure time is determined by the second node based on detecting a timing marker in a Forward Error Correction (FEC) frame or logical layer; determining an arrival time, T, based on detecting the timing marker in the FEC frame; and determining a time difference based on the departure time and the arrival time wherein the timing marker is detected at a last point in a transmitter of the second node and at a first point in a receiver of the first node, during FEC processing.

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Ottawa, Canada

Daniel Claude Perras