D2audio Corporation

Intersil Americas Inc.

Renesas Electronics America Inc.

Daniel Chieng

Douglas D Gephardt

Jeffrey M Klaas

Adam Zaharias

Larry E Hand

Travis Guthrie

David L Beck

Michael Payne

Adam Vaughn

The present embodiments allow multiphase buck controllers to be able to detect Power-on-Reset (POR) automatically and subsequently reboot the system and reconfigure the system as a single or multi-rail system. Some embodiments use an onboard bus that can communicate between controllers. In these and other embodiments, the system is able to recover automatically from a power failure afflicting any or all of the controllers. Embodiments are applicable to flexible plug-and-play modular digital buck regulation applications.

Automatic power-on-reset detection and recovery of a multi-phase digital buck controller

On embodiment pertains to an apparatus including a control loop configured to receive an output voltage sense signal. The control loop includes a compensator; a PWM signal generator coupled to an output of the compensator; a reference circuit configured to receive a tracking signal, and which is configured to low bandwidth low pass filter the tracking signal when the tracking signal amplitude becomes substantially constant and representative of an output voltage that is substantially non-zero, and an error amplifier having a first input coupled to an output of the reference circuit, a second input configured to receive the output voltage sense signal, and an output coupled to the compensator.

Method and system controlling DC-DC voltage converters using tracking signal

On embodiment pertains to an apparatus including a control loop configured to receive an output voltage sense signal. The control loop includes a compensator; a PWM signal generator coupled to an output of the compensator; a reference circuit configured to receive a tracking signal, and which is configured to low bandwidth low pass filter the tracking signal when the tracking signal amplitude becomes substantially constant and representative of an output voltage that is substantially non-zero; and an error amplifier having a first input coupled to an output of the reference circuit, a second input configured to receive the output voltage sense signal, and an output coupled to the compensator.

Method and system for DC-DC voltage converters

Systems and methods provided herein decrease an idle channel noise floor and reduce power during an idle channel input for low power audio devices that include a digital pulse width modulation (PWM) amplifier having a noise shaper. An audio data signal is monitored for an idle channel condition. The noise shaper performs quantization of the audio data signal and uses noise shaper filter coefficients to shape noise resulting from the quantization. Predetermined values for the noise shaper filter coefficients are used to shape the noise resulting from quantization while the idle channel condition is not being detected. The values of the noise shaper filter coefficients are reduced so that the values move toward zeros, and the reduced values of the noise shaper filter coefficients are used to attenuate noise resulting from quantization, while the idle channel condition is being detected. The noise shaper filter coefficients are returned to the predetermined values when the idle channel condition is no longer detected. Alternative embodiments are also provided.

Systems and methods to reduce idle channel current and noise floor in a PWM amplifier

Systems and methods for 'shadowing' a target codec to provide additional features that are not available in the target codec. In one embodiment, an audio amplification system includes a High Definition Audio (HDA) bus, and an HDA controller, a conventional HDA codec and a shadow HDA codec coupled to the HDA bus. The conventional codec receives audio data and commands from the HDA controller via the bus and processes them to generate an output audio signal. The shadow codec snoops the audio data and commands on the HDA bus that are targeted to the conventional codec. The shadow codec processes the snooped audio data and commands to generate a second audio output. The shadow codec does not communicate with the HDA controller and is transparent to the controller. The shadow codec does not request enumeration from the HDA controller and does not receive an address from the HDA controller.

Systems and methods for shadowing an HDA codec

Systems and methods for controlling the audio volume of an audio signal in an HDA codec having a programmable processor such as a DSP, wherein the codec receives digital audio signals and audio volume control verbs over an HDA bus, and the audio volume levels associated with the audio volume control verbs are used by the processor in the generation pulse width modulated (PWM) output signals, thereby controlling the audio volume levels of the output signals. The processor may be configured to adjust non-volume parameters such as PWM deadtime, in addition to adjusting audio volume, based on the audio volume levels. The codec may be implemented in a PC or other system that implements an HDA system that includes the HDA bus and HDA codec.

Systems and methods for controlling audio volume in the processor of a high definition audio codec

Systems and methods for overriding hardwired responses of a codec to High Definition Audio (HDA) verbs that are received from an HDA controller. In one embodiment, an HDA codec is configured to store one or more overriding responses, each of which is associated with a corresponding HDA verb. When an HDA verb is received by the codec, the codec determines whether the verb is associated with one of the overriding responses. If the verb is associated with one of the overriding responses, the overriding response is returned to the HDA controller. If the first HDA verb is not associated with one of the stored overriding responses, provide a hardwired response associated with the first HDA verb to the HDA bus. Overriding responses can be returned for unsupported verbs only, or for any verbs that prompt responses.

Systems and methods for overriding hardwired responses in an HDA codec

Systems and methods for booting a programmable processor such as a DSP that is incorporated into an HDA codec. The codec and a system memory containing boot program instructions are connected to an HDA bus. In a first mode, the DSP receives boot program instructions via the HDA bus and boots using these instructions. In a second mode, the DSP boots from instructions that are contained in a memory that is connected to the DSP. In one embodiment, the memory connected to the DSP is a component of a plug-in card, and the DSP is configured to determine whether the plug-in card is present, then boot from the memory on the plug-in card if it is present or boot from the system memory via the HDA bus if the plug-in card is not present.

Growing community of inventors

Austin, TX, United States of America

Daniel Chieng