Bull S.a.

Bull Hn Information Systems, Inc.

Bull Sas

Daniel Carteau

Laurent Cargemel

Jacques Delepoulle

Philippe Schreck

Gilbert Michaud

Alain Leparoux

Michaud Gilbert

Patricia Giacomini

Laurent Gargemel

Disk drives are mirrored through duplication controlled by disk controllers. Each disk controller controls writing to a set of disk drives. A disk write request to one disk controller causes that disk controller to write to one of its disks and to transmit the write request to another controller that in turn writes to its disk. The second controller then acknowledges the write to the first controller, which in turn acknowledges the write to the computer issuing the request. The first controller further logs the writes in a log file. This allows efficient resynchronization after mirroring is broken and reestablished, as well as removing cable length restrictions between controllers.

Write logging in mirrored disk subsystems

A power distribution unit (PDU) for supplying power to at least one electrical device (APP -APP ), comprises at least one distribution point (P) for the power supply, and at least one female outlet (J -J ) on its accessible side. The outlet is adapted to receive a male connector of a cable of an electrical device (APP -APP ). The point (P) is electrically connected by a respective electrical cable to at least one manually resettable circuit breaker (BRK -BKR ). The at least one circuit breaker comprises a respective push button (POU -POU ) for resetting the circuit breaker. The circuit breaker (BRK -BRK ) is connected by a respective electrical cable to the at least one female outlet (J -J ). The circuit breaker (BRK -BRK ) is located inside the unit and at least one reset mechanism capable of resetting the at least one circuit breaker is provided. Several circuit breakers may be supported in line and the reset mechanism is capable of resetting all of the circuit breakers simultaneously. The push button may be responsive to the condition of the circuit breaker with an end extending beyond the wall for the distribution power unit so as to provide a visual indication that an electrical failure has occurred in one of the electrical devices.

Power distribution unit for electrical devices

A disk cache device for secure writing comprising a backup power supply source ( ) for supplying backup power for a given duration to a computer system fed by two main electric power supply devices ( ) and comprising at least one hard disk drive ( ), and a host system ( ). All of the disk drives ( ) are linked by a bus ( ) to a connection ( ) of the host system ( ) (host bus adapter), and a monitor ( ) for monitoring at least the backup electric power supply source ( ) and the main power supply devices ( ). Monitors ( ) are connected to the interface ( ) and can be interrogated by an interrogator ( ) for interrogating the host system ( ) so that the latter can enable the write disk cache function, or not, in the write commands to be sent to the disk drives ( ) in accordance with the information gathered by the monitoring means ( ).

Disk cache device and method for secure writing of hard disks in mass memory subsystems

A mass memory storage unit includes a cabinet and one or more drawers incorporated into the cabinet. Each drawer is movable between closed and open positions to permit access to the interior for service. Inside each drawer, there is a connector plane disposed generally to one side of the drawer interior and parallel to the direction of travel between the closed and open positions. The connector plane incorporates connectors for receiving storage devices (for example, hard disk drives), each incorporating a connector which detachably mates with one of the connectors on the connector plane. Support and interface devices are coupled to the connector plane by suitable complementary connectors. It is useful to provide a cable, which itself may be detachable from the connector plane, to establish a redundant connection such that the devices in a drawer remain in-circuit when that drawer is opened for access to the enclosed components.

Packaging system for mass memory units

The present invention relates to a disk storage subsystem with multiple configurable interfaces, characterized in that it comprises at least one interface adapter board ( ), at least one drawer ( ), each comprising a plurality of disks ( ), each drawer ( ) being connected to an adapter board ( or ) by SCSI disk interfaces ( ), a first adapter board ( or ) comprising a switch ( ) for modifying the addressing system of the disks ( ) of at least one drawer ( ), the adapter board or boards ( ) each comprising two independent single-ended/differential-ended SE/DE converters ( ), each SE/DE converter ( ) being connected to a drawer ( ) and fed by either of two direct current/direct current DC/DC converters ( ) of the adapter board ( ), and two external SCSI connectors ( ) being connected to each SE/DE converter ( ).

Disk subsystem with multiple configurable interfaces

A multidisk storage system (SD) equipped with a redundancy mechanism comprises at least two disk units (UND,-UND,), at least one redundancy control unit (UNC,-UNC,), a power distribution point (P), and a control unit (EG,-EG,), located in proximity to the point (P), for triggering the opening of the corresponding line (LI,-LI,) in case of an electrical fault in the associated unit and in the line itself. This system therefore ensures an optimal protection against electrical faults and ensures an optimal availability of the data.

Protection against electrical faults in a mass memory data storage system

An add-on device (DHD) for disk drives (D) for a multidisk system containing a plurality of drawers (T) includes a metal base support (S) for a disk drive (D), an opening (O) into which an external connector (CN) of the device is inserted, a mechanism for inserting, extracting and locking (PO, R, R1-R2) the device in a selected slot of the drawer, air passages for ventilating the disk drive, a first printed circuit board (CCE) for interconnecting the disk drive with its external environment, and a second board (CCT) connected to the first printed circuit board for supporting DC voltage conversion functions.

Disk drive add-on device having disk drive with air passages and support

An apparatus (T) for housing a mass memory subsystem (SSM.sub.1 -SSM.sub.3) that is connected to at least one host system (H.sub.1, H.sub.2) is provided. The apparatus includes a plurality of compartments, each compartment receiving at least one of a plurality of groups of disk units (101-112, 201-212, . . . , 601-612); at least one electrical supply unit for supplying electrical power to the disk units; a plurality of plates (P1-P6) having a central portion about which the compartments are arranged. The compartments carry the disk units. The central portion includes an electronic card to which the disk units are connected. The electronic card provides real-time management of disk units and connection of the disk units to the host system. The apparatus has a front portion (PAV) adapted to house the plurality of plates that are slidably insertable into the front portion and are arranged parallel to each other. A rear portion (PAR) of the apparatus includes an electrical power supply and a backpanel connected to each of the electronic cards of the plates by connectors disposed in a predetermined configuration on the backpanel. The configuration of the connectors is based on the configuration of the specific subsystem being housed in the apparatus.

Mass memory subsystem having plates with pluralities of disk drives

A dual-access protected electronic mass memory unit, the various elements of which comprise a plurality of logic boards connected to at least one peripheral controller (CNT.sub.1, CNT.sub.2) of the information processing system (H) to which the unit belongs. The electronic memory unit includes at least one electronic disk unit (DEI.sub.1, DEI.sub.2) including a motherboard (11, 21) containing the corresponding controller (CNT.sub.1, CNT.sub.2), and a plurality of daughter boards (12-13, 22-23) comprising an equal number of memory planes connected among one another two-by-two, the first of them being connected to the motherboard. The central processor and the electronic disk unit are connected by the motherboard to a first and second parallel bus (B.sub.1, B.sub.2).

Protected electronic mass memory unit including first and second buses

A peripheral mass memory subsystem (PSS.sub.1, PSS.sub.2) of an information processing system including at least one central host (H.sub.1, H.sub.2, H.sub.4, H.sub.4), two control units (UC.sub.1, UC.sub.2) and at least one mass memory (BMD.sub.1, BMD.sub.2, . . . ,) with independent electrical power supplies (ALIM.sub.1, ALIM.sub.2, BAT.sub.1, BAT.sub.2) and each having a plurality of structural (hardware+microsoftware) elements (PR.sub.1 -PR.sub.2, DE.sub.1 -DE.sub.2, CA.sub.1 -CA.sub.2, HA.sub.1 -HA.sub.2, DA.sub.1 -D.sub.2) connected to a first and/or a second parallel-type bus (B.sub.1, B.sub.2). The subsystem is characterized in that it includes a microsoftware architecture (AML) that executes the commands of the host and informs the host of changes in state of the mass memory and is embodied by a plurality of functional microsoftware subassemblies (P, H, D, C, S), each of them specific to each structural element of each control unit and implemented in its hardware structure.

Peripheral mass memory subsystem have identical controllers connected to

A protected method of fast writing of information for at least one mass memory apparatus (DMM.sub.1) belonging to an information processing system including at least one central host (H.sub.1, H.sub.2), two control units (UC.sub.1, UC.sub.2) with independent electrical power supplies (ALIM.sub.1, ALIM.sub.2, BAT.sub.1, BAT.sub.2) connected to a first and second parallel bus (B.sub.1, B.sub.2) is disclosed wherein the method is characterized in that, if the host (H.sub.1, H.sub.2) is connected to each of the two buses via at least one first host adaptor (HA.sub.1, HA.sub.2) belonging to the first control unit (UC.sub.1, UC.sub.2) and the mass memory (D.sub.1 -D.sub.5) is connected to each of the two buses via a first and a second mass memory adaptor (DA.sub.1, DA.sub.2) belonging to the first and second control unit, respectively, which include a first and a second memory buffer (MTD.sub.1, MTD.sub.2), respectively, I--the block of data to be written is memorized in the first host buffer (MTH.sub.1, MTH.sub.2) and memory buffer (MTD.sub.1, MTD.sub.2); II--the first mass memory adaptor (DA.sub.1, DA.sub.2) reserves the mass memory (D.sub.1 -D.sub.5, D.sub.6 -D.sub.10); III--the mass memory adaptor (DA.sub.1) then informs the host adaptor (HA.sub.1) of this, which host adaptor then sends an acknowledgement signal to the central host (H.sub.1); IV--the operation of writing the block in its entirety is performed in the mass memory under the direction of the first mass memory adaptor (DA.sub.1) or the second, if the first is defective. The invention is applicable to mass memory subsystems.

Protected method for fast writing of data for mass memory apparatus

An information processing system architecture (ORDI), in which the various constituent elements (B.sub.1 -B.sub.6, A.sub.1 -A.sub.6, C.sub.1 -C.sub.4) comprise a plurality of boards (CDI.sub.i and CGI.sub.j), each embodied by printed circuits carrying a plurality of integrated circuits, and including at least two sets of elements (ENSI.sub.1, ENSI.sub.2), all or some of the elements of one set being identical to all or some of the elements of the other. The sets are associated with two system buses of the parallel type (PSBA, PSBBI) that assure both communications and the transfer of data and electrical energy among the boards. The two buses have a total or partial overlap zone (ZC) between them, on which either one or more elements (C.sub.1 -C.sub.2, C.sub.3 -C.sub.4) common to the two sets exclusively, and elements belonging to the first set (ENSI.sub.1, A.sub.5 and A.sub.6) and/or to the second set (ENSI.sub.2, B.sub.5 and B.sub.6), are connected.

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Montigny le Bretonneux, France

Daniel Carteau