Stmicroelectronics (crolles 2) Sas

Stmicroelectronics (rousset) Sas

Stmicroelectronics S.a.

Daniel Benoit

Philippe Boivin

Remy Berthelon

Olivier Hinsinger

Emmanuel Gourvest

Clement Gaumer

Pierre Morin

Laurent Favennec

Jorge Regolini

The present disclosure concerns a phase-change memory manufacturing method and a phase-change memory device. The method includes forming a first insulating layer in cavities located vertically in line with strips of phase-change material, and anisotropically etching the portions of the first insulating layer located at the bottom of the cavities; and a phase-change memory device including a first insulating layer against lateral walls of cavities located vertically in line with strips of phase-change material.

Phase-change memory with an insulating layer on a cavity sidewall

Phase-change memory with insulated walls

A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.

Back-side illuminated image sensor

A transistor is formed by defining a gate stack on top of a semiconductor layer. The gate stack includes a gate dielectric and a gate electrode. A layer of a first dielectric material, having a first dielectric constant, is deposited on side walls of the gate stack to form sacrificial sidewall spacers. Raised source-drain regions are then epitaxially grown on each side of the gate stack adjacent the sacrificial sidewall spacers. The sacrificial sidewall spacers are then removed to produce openings between each raised source-drain region and the gate stack. A layer of a second dielectric material, having a second dielectric constant less than the first dielectric constant, is then deposited in the openings and on side walls of the gate stack to form low-k sidewall spacers.

Transistor with a low-k sidewall spacer and method of making same

A method for forming a trench filled with an insulator crossing a single-crystal silicon layer and a first SiOlayer and penetrating into a silicon support, this method including the steps of forming on the silicon layer a second SiOlayer and a first silicon nitride layer, forming the trench, and performing a first oxidizing processing to form a third SiOlayer; performing a second oxidizing processing to form, on the exposed surfaces of the first silicon nitride layer a fourth SiOlayer; depositing a second silicon nitride layer and filling the trench with SiO; and removing the upper portion of the structure until the upper surface of the silicon layer is exposed.

Shallow trench forming method

A MOS transistor includes an etch stop layer presenting a density of less than a determined threshold value, below which the material of said stop layer is permeable to molecules of dihydrogen and/or water. The material may comprise a nitride. A material used for the etch stop layer preferably has a density value of less than about 2.4 g/cm.

Growing community of inventors

Saint-Ismier, France

Daniel Benoit