Micron Technology Incorporated

Daniel Benjamin Stewart

Matthew Alan Prather

Brent Keeth

Frank F Ross

Randall J Rooney

Jasper S Gibbons

Eric J Stave

The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.

Memory module multiple port buffer techniques

A method of operating an oscilloscope is disclosed. The method comprises providing a bit stream comprising pseudo-random data to an oscilloscope across a data path characterized by sufficient signal degradation to prevent the oscilloscope from reliably triggering a sweep of an eye pattern based on receiving the pseudo-random data; inserting a predetermined sequence of bits into the bit stream at predetermined periodic intervals to open the eye pattern sufficiently during each of the periodic intervals to permit the oscilloscope to trigger the sweep of the eye pattern; and generating the eye pattern based at least in part on the pseudo-random data and excluding the predetermined sequence of bits from the sweep of the eye pattern. Oscilloscopes configured to trigger according to a predetermined system of bits at predetermined intervals are also disclosed.

Methods for triggering oscilloscopes and oscilloscopes employing the same

Systems, apparatuses, and methods related to a printed circuit board (PCB) with a plurality of layers are described. An edge connector may be formed on an end of the PCB substrate and may include contact pins on an outer layer of the plurality of layers. The edge connector may also include an intra-pair coupling block disposed on one or more interior layers such that at least a portion of the intra-pair coupling block is colinear with at least one contact pin on the outer layer. The electronic device may also include at least one integrated circuit on the PCB and electrically connected to the contact pins. The intra-pair coupling component may induce coupling of signals carried by the contact pins.

Growing community of inventors

Boise, ID, United States of America

Daniel Benjamin Stewart