Freescale Semiconductor,inc.

Motorola Corporation

Intel Corporation

Other

Apple Inc.

Freescale Semiconductors Inc.

Intel IP Corporation

Daniel B Schwartz

Christopher K Chun

Bing Xu

Simon Svendsen

Patrick Joseph Pratt

Poul Olesen

Paul Kelleher

Ole Jagielski

Michael Milyard

Stephen G Shook

Farooq Shaikh

Cary D Perttunen

Conor O'Keeffe

Kevin B Traylor

Claudio Gustavo Rey

Barbara M Foley

David B Harnishfeger

Norman Beamish

Gregory W Chance

Mark Alan Kirschenmann

Ray D Sundstrom

Pravin Premakanthan

Niranjan Karandikar

Earnest J Johnson

Mohammed Alam

John J Parkes, Jr

Vivek Bhan

George Edward Charles

Dong-Jun Yang

Kenneth Stebbings

Philip C Warder

Man Shing Wong

Nadim Khlat

Michael S Lebby

Yang-Seok Choi

Ashoke Ravi

Gregory Redmond Black

Feng Xue

Venkatesan Nallampatti Ekambaram

Shu-Ping Yeh

Davis H Hartman

Werner Schelmbauer

Amit D Bavisi

George Norris

Nebil Tanzi

Dale Brian Halling

Patrick Clement

Wayne Ballantyne

Namyoon Lee

Clive K Tang

Melissa Denvir

Chia-Hsiang Chen

Armando Cova

David Redmond

Jeffrey D Ganger

Ching-En Lee

Mahib Rahman

Glenn D Raskin

James Riches

Simon Hughes

Aidan Murphy

Michael David Vicker

Keith A Tilley

Wayne Edwards

Hugh O Brien

Douglas P Fayden

Yiwen Chen

Conor Okeeffe

Ricardo Fernandez

Mark Kirschenmann

Michael A Milyard

Techniques are disclosed for providing isolation between a pair of partially overlapping antennas. An example electronic device includes a first antenna coupled to a first transceiver through a first signal path comprising a first feed, and a second antenna coupled to a second transceiver through a second signal path comprising a second feed. The first antenna and second antenna partially overlap. The example electronic device also includes compensation circuitry coupled to the first signal path and the second signal path and configured to generate a compensation signal that provides analog cancellation of an interference signal received at the second antenna from the first antenna.

Antenna isolation enhancement

A communication circuit arrangement includes a first kernel dimension filter circuit configured to apply a first kernel dimension filter to a first input signal to estimate a first kernel dimension interference signal from a first amplifier, a second kernel dimension filter circuit configured to apply a second kernel dimension filter to a second input signal to estimate a second kernel dimension interference signal from a second amplifier, a joint delay tap dimension filter configured to apply a joint delay tap dimension filter to a combination of the first kernel dimension interference signal and the second kernel dimension interference signal to obtain an estimated joint interference signal, and a cancelation circuit configured to remove the estimated joint interference signal from a received signal to obtain a clean signal.

Apparatuses and methods for joint interference cancelation

Techniques are provided for reducing or mitigating phase noise of a digital phase lock loop or the system depending on the digital phase lock loop. In an example, a multiple-mode digital phase lock loop can include a digital phase lock loop (DPLL), multiple frequency scalers configured to receive a reference clock, and a multiplexer configured to receive a mode command signal and to couple an output of one of the multiple frequency scalers to an input of the DPLL in response to a state of the mode command signal.

Techniques for addressing phase noise and phase lock loop performance

A wireless communication device can include an antenna array configured to receive a plurality of radio frequency (RF) signals, RF circuitry, and digital baseband receive circuitry. The RF circuitry is configured to process the plurality of RF signals received via the antenna array to generate a single RF signal. The digital baseband receive circuitry is coupled to the RF circuitry and is configured to generate a downconverted signal based on the single RF signal, amplify the downconverted signal to generate an amplified downconverted signal, and convert the amplified downconverted signal to generate a digital output signal for processing by a wireless modem. The digital baseband receive circuitry further includes at least a first filtering system configured to filter the downconverted signal prior to amplification.

High-performance receiver architecture

A wireless communication device can include an antenna configured to sense a radio frequency (RF) signal. The wireless communication device can include signal estimation circuitry configured to generate estimates of amplitude and frequency for unmodulated spurs within the RF signal. The wireless communication device can further include multi-tone generator circuitry coupled to the signal estimation circuitry and configured to generate a composite spur cancellation signal based on the estimates of amplitude and frequency for unmodulated spurs within the RF signal. The wireless communication device can further include adder circuitry configured to subtract the spur cancellation signal from the RF signal to generate a spur cancelled signal.

Noise reduction and spur and distortion cancellation techniques

A method of generating a transmission signal may include mixing a baseband signal assigned for transmission within a narrow frequency range ('assigned narrow frequency range') included in a wireless communication channel to produce a shifted signal. The shifted signal may have a shifted frequency that is based on a shift from the assigned narrow frequency range toward a center frequency of the wireless communication channel by a frequency offset. The method may further include shifting a modulation frequency of a modulating signal toward the assigned narrow frequency range frequency range and away from the center frequency by the frequency offset. Additionally, the method may include mixing the shifted signal with the modulating signal to produce a transmission signal having a transmission frequency within the assigned narrow frequency range.

Reducing transmission signal artifact spacing

An apparatus comprises a number of sub-systems and a control interface operably coupled to sub-systems for routing data therebetween. A strobe generation function is operably coupled to the control interface and configured to generate a plurality of different strobe signals to differentiate between different intended receiving devices. Thus, different strobe signals may be multiplexed onto a single control interface link, based on a pulse width or voltage magnitude characteristics of the respective strobe signals. A strobe decoder function is operably coupled to the control interface and configured to decode a plurality of different strobe signals to differentiate between triggering sub-systems on receiving devices.

Apparatus and control interface therefor

In accordance with some embodiments of the present disclosure, a control path for a wireless communication device may include a radio frequency coupler having a coupled port and a terminated port, the radio frequency coupler configured to couple at least a portion of a transmission power of a transmission line coupled to the antenna tuner such that the coupled port carries a first signal indicative of an incident power transmitted to an antenna coupled to the antenna tuner and the terminated port carries a second signal indicative of a reflected power reflected by the antenna. the control path may also include a control module configured to communicate the one or more control signals to the antenna tuner for controlling the impedance of the antenna tuner based at least on the first signal and the second signal.

System and method for tuning an antenna in a wireless communication device

In accordance with some embodiments of the present disclosure, a method may include determining a range of frequencies allocated to resource blocks to be transmitted during a subsequent sub-frame slot or sounding reference symbol sub-slot. The method may also include determining an approximate center frequency of the range of frequencies. The method may additionally include modulating resource blocks of the sub-frame or sounding reference symbol sub-slot at the approximate center frequency. The method may further include transmitting the modulated resource blocks at the approximate center frequency.

System and method for frequency-agile transmission in a wireless communication device

A wireless communication unit has two or more communication modes including one or more mobile phone mode, in which mobile phone mode the wireless communication unit is able to transmit or receive wireless signals via an antenna from and/or to a mobile phone network in accordance with a communication protocol. The unit includes a baseband module and a radiofrequency module. A radiofrequency interface of the baseband module is connected to the radiofrequency module, for receiving and/or transmitting baseband signals from and/or to the radiofrequency module. The radiofrequency module includes a baseband interface, for receiving and/or transmitting the baseband signals to the baseband module and an antenna interface (AI) connectable to an antenna for receiving and/or transmitting radiofrequency signals from and/or to the antenna. A clock system is connected to the radiofrequency interface and the baseband interface. The clock system can provide a clock signal with a clock rate of to the radiofrequency interface and the baseband interface in one or more of the one or more mobile phone modes.

Wireless communication unit, baseband module, radio frequency module, wireless terminal and computer program product

A wireless communication device comprises a first sub-system arranged to pass data to a second sub-system comprising timing synchronization logic operably coupled to a counter, such that data is sampled by the timing synchronization logic when passed to the second sub-system from the first sub-system wherein the wireless communication device is characterized in that the timing synchronization logic is arranged to determine a position of a first data frame and in response thereto initiate a counting process of the counter and determine a position of a second data frame and in response thereto determine a count value from the counting process of the counter and in response to the count value determine whether to initiate a timing advance or timing retard operation on the data being passed to the second sub-system. In this manner, the inventive concept provides the wireless communication device with a mechanism to achieve timing synchronization. In particular, the inventive concept may allow a radio frequency integrated circuit to implement timing synchronization by advancing or retarding an 'actual' signal sent from digital baseband circuits in a 3G DigRF wireless communication device.

Wireless communication device, integrated circuit and method of timing synchronisation

A method of processing location information on a mobile device which includes a primary receiver for receiving a primary signal; a diversity receiver for receiving a diversity signal or location information; a diversity combiner which can combine primary and diversity signals to form a combined signal; and a first processing unit for processing the combined signal; the method comprising the steps of: identifying whether the device is in a location mode or a diversity mode; if the device is in location mode, disabling the diversity combiner; passing the output from the primary receiver directly to the first processing unit; and passing location information from the diversity receiver to a location processing unit.

Method and apparatus to receive location information in a diversity enabled receiver

Apparatus, systems, and methods are provided for controlling the output of a transmitter using a digital error signal. A method comprises generating a digital reference signal based on a baseband input signal and converting the digital reference signal to an analog reference signal. The method further comprises generating an analog error signal in response to a difference between the analog reference signal and an analog output signal. The method further comprises generating a digital error signal from the analog error signal, and generating an input signal for the transmitter based on the baseband input signal and the digital error signal.

Error signal processing systems for generating a digital error signal from an analog error signal

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Apache Junction, AZ, United States of America

Daniel B Schwartz