Texas Instruments Corporation

Daniel A Baudouin

Ernest J Russell

James S Wallace

Duy-Loan T Le

Alton D Carpenter

Jeffrey W Janzen

Ernie Russell

Akitoshi Nishimura

Adin E Hyslop

Mark A Kressley

John R Dumas

A semiconductor device is disclosed. The device includes an integrated circuit chip having integral de-coupling capacitors on the chip backside. The de-coupling capacitors includes a metal layer in intimate contact with the semiconductor substrate of the integrated circuit, a dielectric layer and a second metal layer. The second metal layer is segmented to form multiple capacitors, and each capacitor is interconnected to power supplies of the chip. Interconnection to different integrated circuit packages is provided. A method of making the semiconductor device is also disclosed.

Integrated capacitor on the back of a chip

In a surface mount assembly, an active integrated circuit device, such as, for example, a dynamic random access memory, typically has a lead finger attached to a solder pad of a printed wiring board. The surface mount assembly is significantly improved by configuring a passive component, such as a resistor or capacitor, such that it has metallic terminations on an upper and lower surface so that it may be positioned between the solder pad of the printed wiring board and the lead finger.

Vertical passive components for surface mount assembly

Two flat packages (110, 111) are arranged to achieve a mirrored footprint by employing guides (100), which are positioned within a mounting aperature a printed circuit board. The flat packages include leads (120, 121) which extend from an edge of the flat package. A semiconductor chip is encapsulated by the flat packages.

Vertical package mounted on both sides of a printed circuit board

The invention discloses a high density semiconductor package. Two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.

High density semiconductor package

The invention discloses a high density semiconductor package. In one embodiment, two semiconductor chips are each affixed on a corresponding one of two lead frames. The semiconductor chips and the lead frames are encapsulated, wherein only a portion of the leads of the lead frames protrudes and extends from the package.

A mounting device (170) of a semiconductor integrated circuit (202) allows edge mounting on surface of a printed circuit board (250). The mounting device includes a top portion (150) to provide for cooling and protection of the semiconductor chip while a side portion (140) provides for cooling and positioning on the printed circuit board.

High power dissipation vertical mounted package for surface mount

An integrated circuit card includes packaged semiconductor devices mounted on a substrate. The integrated circuit card also includes a housing bonded by sheet adhesives to the semiconductor devices or substrate. The housing includes top and bottom metal covers and may include spacers positioned between the sheet adhesives and semiconductor devices or substrate.

Integrated circuit card

A packaged integrated circuit device (2) has exposed contacts (8a, 8b) for electrical connection to terminals of an electrical component, such as a bypass capacitor (10), mounted externally from packaging material (4). The contacts (8a, 8b) are electrically connected to power and ground leads (6) extending from packaging material (4).

Integrated circuit with supports for mounting an electrical component

An edge-mounted integrated circuit device (10 ) includes a semiconductor die (11) and a lead frame (15) attached to the semiconductor die (11). The lead frame (15) includes a plurality of leads (14) electrically connected to the semiconductor die and lead frame supports (16, 18). A package (12) encapsulates the semiconductor die and a portion of the lead frame (15). The leads (14) extend from the package (12) and are bent to present a face for surface mount connection to conductors on a substrate. The supports (16, 18) extend from the package (12) for contacting the substrate to support the device (10) in position for soldering the leads (14) to conductors on the substrate.

Edge-mounted, surface-mount integrated circuit device

A flat package for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic containing a semiconductor chip, and flat leads extend from one edge of the package. The leads are bent to provide an area to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs extending from the edge of the package adjacent the leads. The studs have stops formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.

Method of making a relatively flat semiconductor package having a

Edge-mounted, surface-mount package for semiconductor integrated circuit

A memory card has a housing including an interior chamber and a top metal cover. A substrate is located in the interior chamber and carries printed circuit leads, packaged semiconductor devices connected to selected printed circuit leads, and a connector connected to selected printed circuit leads. The packaged semiconductor devices are spaced from the top metal cover and a thermal coupler is located between the top metal cover and the packaged semiconductor devices for coupling heat generated by the packaged semiconductor devices to the top metal cover.

Memory card with flexible conductor between substrate and metal cover

A printed circuit board or other substrate mounts electrical components substantially coplanar with the median plane or thickness of the board or substrate. The board furnishes an opening having bonding pads plated through the opening and fixed on the opposite sidewalls of the opening. The electrical component becomes placed in the the opening with solder paste between the bonding pads and end terminals of the electrical component. Reflow soldering techniques melt the solder paste into solder filets that solidify to fasten the electrical component within the opening in coplanar with the median plane or thickness of the board.

Mounting of high density components on substrate

An electronic calculator or data processing system implemented on semi-conductor chips to operate several chips in synchronism where at least one element common to the operation of all chips is responsive to sequentially generated operating states. A master clock applies clock pulses to the clock input terminal of one chip. A control gate is provided in the circuit leading to the clock input terminals of the other chip or chips. A comparator is connected to selected operating state output terminals from both or all of said chips and is connected to the control gate for inhibiting flow of clock signals to the other chip or chips so long as said selected states differ.

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Missouri City, TX, United States of America

Daniel A Baudouin