University of Illinois

Dane J Sievers

J Gary Eden

Clark J Wagner

Paul A Tchertchian

Thomas J Houlahan, Jr

Benben Li

Andrey Mironov

Lukas Janavicius

Xiuling Li

James Gary Eden

Jeong Dong Kim

Sartaj Grewal

Julian Michaels

Jinhong Kim

A fabrication tool has at least one flat lamp photon source, or an array of flat lamps, that serve to non-thermally ablate polymer material from a surface. No photoresist is required and the desired photoablated pattern is determined by inserting a photolithographic mask between the lamp(s) and the surface to be processed. Methods of the invention pattern organic polymer and can pattern a substrate using a pattern established in an organic polymer layer on the substrate, and can also deposit materials in the pattern by breaking bonds in deposition precursors with photons from the microplasma array. Another method converts organic polymer material to have a hydrophylic surface. A tool of the invention can have width and depth comparable to a typical paperback book and a height comparable to a coffee cup.

Photoresist-free photolithography, photoprocessing tools, and methods with VUV or deep-UV lamps

A method for photoresist-free photolithography to pattern a surface of conductor or semiconductor substrate and deposit a material includes surface cleaning and irradiating a surface through a mask with VUV photons from a lamp. Photons are generated with a VUV lamp having a wavelength of 160 nm-200 nm and with an intensity sufficient to alter the surface. The photons are directed through a mask pattern to alter the surface chemistry or structure in those areas of the substrate defined by the mask. Material is selectively deposited onto the surface, in those portions of the surface that are exposed to the VUV photons, or unexposed to the VUV photons, depending on the substrate surface. A method uses a seed film and then electroplates metal onto the seed film in the mask pattern. A method provides for electroless deposition of metal and another for altering surface chemistry in the mask pattern.

Photoresist-free deposition and patterning with vacuum ultraviolet lamps

In an example, a method including dispensing a liquid onto a first portion of a surface of a substrate and dispensing a solution comprising colloidal spheres onto a second portion of the surface of the substrate. The method additionally includes agitating the colloidal spheres to disperse the colloidal spheres along the first portion and the second portion of the surface of the substrate and directing air flow above the colloidal spheres inducing rotation of the colloidal spheres. In another example, a method includes positioning a retaining ring on a surface of a liquid above a substrate below the surface of the liquid and dispensing a solution comprising colloidal spheres onto the surface of the liquid within a surface area of the retaining ring. The method further includes agitating the surface of the liquid and the colloidal spheres to disperse the colloidal spheres along the surface area of the retaining ring.

Methods and systems for large area and low defect monolayer ordering of microspheres and nanospheres

A method of catalyst-assisted chemical etching with a vapor-phase etchant has been developed. In one approach, a semiconductor substrate including a patterned titanium nitride layer thereon is heated, and an oxidant and an acid are evaporated to form a vapor-phase etchant comprising an oxidant vapor and an acid vapor. The semiconductor substrate and the patterned titanium nitride layer are exposed to the vapor-phase etchant during the heating of the semiconductor substrate. The vapor-phase etchant diffuses through the patterned titanium nitride layer, and titanium nitride-covered regions of the semiconductor substrate are etched. Thus, an etched semiconductor structure is formed.

Catalyst-assisted chemical etching with a vapor-phase etchant

Logic devices are provided in multiple sub-collector and sub-emitter microplasma devices formed in thin and flexible, or inflexible, semiconductor materials. Logic operations are provided with one of a plurality of microplasmas forming sub-collectors with a common emitter, or a common collector plasma with a plurality of sub-emitter regions in a solid state semi-conductor pn-junction, and generating a logic output from an electrode, based upon electrode inputs to two other electrodes.

Logic function generation from single microplasma transistor devices and arrays of devices

A hybrid plasma semiconductor device has a thin and flexible semiconductor base layer. An emitter region is diffused into the base layer forming a pn-junction. An insulator layer is upon one side the base layer and emitter region. Base and emitter electrodes are isolated from each other by the insulator layer and electrically contact the base layer and emitter region through the insulator layer. A thin and flexible collector layer is upon an opposite side of the base layer. A microcavity is formed in the collector layer and is aligned with the emitter region. Collector electrodes are arranged to sustain a microplasma within the microcavity with application of voltage to the collector electrodes. A depth of the emitter region and a thickness of the base layer are set to define a predetermined thin portion of the base layer as a base region between the emitter region and the microcavity. Microplasma generated in the microcavity serves as a collector. Logic devices are provided in multiple sub collector and sub emitter microplasma devices formed in thin and flexible or not flexible semiconductor materials.

Hybrid plasma-semiconductor transistors, logic devices and arrays

Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). A preferred device is a hybrid plasma semiconductor device having base, emitting and microcavity collector regions formed on a single side of a device layer. Visible or ultraviolet light is emitted during operation by plasma collectors in the array. In preferred embodiments, individual PBJTs in the array serve as sub-pixels of a full-color display.

Flexible and on wafer hybrid plasma-semiconductor transistors

Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). Doped solid state semiconductor regions are in a thin flexible solid state substrate, and a flexible non conducting material defining a microcavity adjacent the semiconductor regions. The flexible non conducting material is bonded to the thin flexible solid state substrate, and at least one electrode is arranged with respect to said flexible substrate to generate a plasma in said microcavity, where the plasma will influence or perform a semiconducting function in cooperation with said solid state semiconductor regions. A preferred on-wafer device is formed on a single side of a silicon on insulator wafer and defines the collector (plasma cavity), emitter and base regions on a common side, which provides a simplified and easy to manufacture structure. A preferred embodiment array of flexible hybrid plasma transistors of the invention is an n+pn PBJT fabricated between two flexible sheets. One or both of the flexible sheets is transparent. The overall array structure is planar, and the planarized structure is sealed between the two flexible sheets. Visible or ultraviolet light is emitted during operation by plasma collectors in the array. In preferred embodiments, individual PBJTs in the array serve as sub-pixels of a full-color display.

Growing community of inventors

Fisher, IL, United States of America

Dane J Sievers