Shanghai Avic Opto Electronics Co., Ltd.

Tianma Micro-electronics Co., Ltd.

Shanghai Tianma Micro-electronics Co., Ltd.

Dandan Qin

Zhaokeng Cao

Tinghai Wang

Huijun Jin

Tingting Cui

Shoufu Jian

Yao Lin

Yinghua Mo

Feng Qin

Rili Fei

Ying Xie

Kerui Xi

Boping Shen

Zhiqiang Xia

Xiufeng Zhou

Dongliang Dun

Min Cai

Xiaodong Luo

Yongjun Wu

Zhiqi Chen

Benshun Zhong

Houxun Xia

A drive circuit includes: a first shift register, a first signal line, a second signal line, and a drive module. The first shift register includes a first node and a second node, the first signal line provides a first input signal for the first shift register, the second signal line provides a second input signal for the first shift register, and the first shift register controls potentials of the first node and the second node according to the first input signal and the second input signal. The drive module is electrically connected to the first node, the second node, the first signal line and the second signal line separately, detects the potentials of the first node and the second node, and adjusts at least one of the first input signal and the second input signal according to a potential detection result of the first node and the second node.

Drive circuit and display device

Provided display panel includes display region and non-display region. The display region includes display units arranged in array and scan signal lines. At least part display units in same row share respective scan signal line. The non-display region includes shift register circuit and connection lines. The shift register circuit includes cascaded shift register unit groups each including at least two shift register units each including signal input terminal, reset control terminal, and signal output terminal. Signal output terminal of first shift register unit in (i+1)-th shift register unit group electrically connected to signal input terminal of respective shift register unit in (i+2)-th shift register unit group through same connection line. Signal output terminal of second shift register unit in (i+1)-th shift register unit group electrically connected to reset control terminal of respective shift register unit in i-th shift register unit group through same connection line. i is positive integer.

Display panel and display device

A touch display panel and a touch display device. The touch display panel includes a first display area, a second display area and a binding area arranged along a first direction, and a touch bonding pad is arranged in the binding area and is configured to input touch driving signals; a plurality of touch electrodes are arranged in each of the first display area and the second display area; the touch display panel further includes a plurality of touch signal lines extending along the first direction and arranged at intervals along a second direction, the touch bonding pad is electrically connected to the touch electrodes by the touch signal lines; and touch signal lines electrically connected to the touch electrodes in the first display area are first touch signal lines, touch signal lines electrically connected to the touch electrodes in the second display area are second touch signal lines.

Touch display panel and touch display device

A light-emitting structure, a backlight module, a display module, and a display device are provided. The light-emitting structure includes a circuit substrate, including a first surface and a second surface sequentially arranged along a light-exiting direction of the light-emitting structure. The circuit substrate also includes a light-transparent substrate and a wiring structure located on a side of the light-transparent substrate in a thickness direction. The light-emitting structure also includes a plurality of light-emitting elements, arranged in an array on one of the first surface or the second surface of the circuit substrate. The plurality of the light-emitting elements is electrically connected to the wiring structure. The light-emitting structure also includes a heat sink, located on a side of the first surface of the circuit substrate. The heat sink is configured for dissipating heat generated by the plurality of the light-emitting elements.

Light-emitting structure, backlight module, display module, and display device

Provided are a display panel and a display apparatus. The display panel has a bonding region where a chip is bonded, and a fan-out region where fan-out leads is arranged. Bonding pads in the bonding region include a first pad array and a second pad array, the first pad array being at a side of the second pad array close to the display region. The first pad array includes first pads arranged in at least two rows. The first pad array includes at least one inclined section including at least three first pads that are arranged sequentially and obliquely away from the display region. Such an arrangement allows at least a portion of the fan-out leads to be displaced into the bonding region, to increase the area for arranging the fan-out leads. Therefore, the lower border of the display panel is narrowed.

Display panel and display apparatus

Provided are a shift register, a gate drive circuit and a display panel. The shift register includes a reset module, where a first control terminal of the reset module is electrically connected to a first reset-signal input terminal, a second control terminal of the reset module is electrically connected to a second reset-signal input terminal, an input terminal of the reset module is electrically connected to a second power-signal input terminal, a first output terminal of the reset module is electrically connected to a first node, and a second output terminal of the reset module is electrically connected to a scanning-signal output terminal. In the third phase, the potential of the first node P is at a second level, each of potentials of the first control terminal and the second control terminal of the reset module is at the second level.

Shift register, gate drive circuit and display panel

An array substrate, a display panel, and a display device are provided. The array substrate includes a display region and a non-display region surrounding the display region. The array substrate also includes a plurality of gate lines. The plurality of gate lines include a plurality of regular gate lines and at least one irregular gate line. The plurality of regular gate lines are disposed in the display region and extended along a first direction. The at least one irregular gate line includes at least one first trace portion and a second trace portion electrically connected to each other. The at least one first trace portion has a same line width as a regular gate line of the plurality of regular gate lines, and the second trace portion has a line width smaller than the at least one first trace portion.

Array substrate, display panel, and display device thereof

A shift register includes a forward/backward scan-control module, configured to transmit a signal of a forward-scan-signal terminal or a signal of a backward-scan-signal terminal to a first node; an interlock module, configured to transmit a signal of a first voltage terminal to a second node, and transmit a signal of a second voltage terminal to the first node; a pull-down module, configured to transmit the signal of the first voltage terminal to a gate-signal output terminal; an output module, configured to transmit a signal of a second clock-signal terminal to the gate-signal output terminal; and a reset module, configured to transmit the signal of the second voltage terminal to the first node, and transmit the signal of the first voltage terminal to the gate-signal output terminal. The disclosed shift register can prevent leakage of the first node, and thus improve the quality and the performance of the shift register.

Shift register, gate driving circuit, display device, and driving method thereof

A display panel and a display device are provided. The display panel comprises: a display area; a non-display area surrounding the display area; and a plurality of primary-color pixels and a plurality of color-mixing pixels disposed in the display area. A primary-color pixel includes a first electrode, and the first electrode includes M number of stripe-shaped first electrode branches. A color-mixing pixel includes a second electrode, and the second electrode includes N number of stripe-shaped second electrode branches, where M&#x3e;N, and both M and N are integers greater than 0. A width D2 of the second electrode branch is greater than a width D1 of the first electrode branch.

The present disclosure provides a display panel and a display device. The display panel includes a plurality of sub-pixels arranged in an array. A region between any two adjacent columns of sub-pixels is a column spacing region. The column spacing region includes a first column spacing region with signal touch line and a second column spacing region. In each column of sub-pixels adjacent to the first column spacing region, adjacent ends of any two adjacent sub-pixels close to the first column spacing region are aligned in a sub-pixel column direction. In each column of sub-pixels adjacent to the second column spacing region, adjacent ends of at least two adjacent sub-pixels close to the second column spacing region are misaligned in the sub-pixel column direction.

Display panel including touch signal lines arranged in different column spacing regions, and display device including the same

An array substrate and a liquid crystal display panel including the array substrate are provided. The array substrate includes: multiple pixel units; at least one additional functional area located in each row of a matrix formed by the multiple pixel units, where the additional functional area is provided with a gate signal detecting transistor; and a detection signal output line and a preset signal line connected with each other. By detecting whether a drive signal on a gate line is normal using the gate signal detecting transistor, the problem of manually detecting one-by one whether a signal on a gate line is normal can be avoided, thereby improving the detection efficiency and accuracy.

Array substrate and liquid crystal display panel

A pixel structure, array substrate, display panel, display device, and driving method of the display device are provided. The pixel structure includes a plurality of data lines and a plurality of scan lines; a plurality of pixel units formed by intersecting the data lines with the scan lines. Each of the pixel units corresponds to one of the data lines and one of the scan lines; and the pixel unit includes a pixel electrode and a thin film transistor therein. In one of two adjacent columns of pixel units, a pixel electrode of each pixel unit is electrically connected with a thin film transistor of the pixel unit; and in the other one of the two adjacent columns of pixel units, a pixel electrode of each pixel unit in a row is electrically connected with a thin film transistor of a pixel unit in an adjacent row.

Pixel structure and display device for dot inversion, and driving method of display device

A display panel and an electronic device are provided. The display panel includes: multiple pixel units arranged in an array; multiple data lines for providing data signals for the pixel units; multiple gate lines for providing gate scanning signals for the pixel units; and at least one enhancing region, where at least one gate signal enhancing transistor and at least one of the pixel units are disposed in the enhancing region, the gate signal enhancing transistor is configured to pre-charge a gate line for a pixel row where the gate signal enhancing transistor is located. An electronic device including the display panel has a quick response speed and a narrow border region.

Display panel device

The disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines and a plurality of scan lines, and a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines. A pixel unit corresponds to one of the plurality of data lines and one of the plurality of scan lines. The pixel unit includes a pixel electrode and a TFT. The pixel electrode of the pixel unit in a row is electrically connected to a TFT of a pixel unit in a preceding adjacent row of the pixel electrode of the pixel unit.

Growing community of inventors

Shanghai, China

Dandan Qin