International Business Machines Corporation

Dana J Thygesen

Sebastian Theodore Ventrone

Kenneth Joseph Goodnow

Wilbur David Pricer

Peter Anthony Sandon

Thomas Pflueger

Janak G Patel

Alvar Antonio Dean

Gerard M Salem

Ulrich Weiss

Cédric Lichtenau

Rolf B Hilgendorf

Jens Kuenzer

Stephen William Mahin

Mathew I Ringler

A synchronization system capable of simultaneously resetting frequency divide-by counters () of multiple processors (A, B) to zero regardless of the divide-by frequency signal (Mclk/n signal ()) and regardless of the magnitude of the clock mesh delays experienced by the Mclk/n signals in the processors. The synchronization system includes a mesh delay circuit () for each processor that simulates in the undivided signal (Mclk/1 signal ()) the clock mesh delay experienced by the Mclk/n signal in that processor so as to provide an Lclk signal (). A phase detector detects the phase offset between the Mclk/n signal and the Sysclk signal () and sends an asynchronous offset signal () to a counter re-setter () that resets the divide-by counter to zero based on the offset signal.

System and method for synchronizing divide-by counters

A substrate for supporting a semiconductor chip has area array connectors on at least two surfaces to provide a large number of connectors to the chip. At least one contact on one surface is not connected to a contact on the other surface through the substrate. Carriers, such as printed circuit boards are mounted to the two surfaces.

Chip package having connectors on at least two sides

The present invention provides a performance based system and method for dynamic allocation of a unified multiport cache. A multiport cache system is disclosed that allows multiple single-cycle look ups through a multiport tag and multiple single-cycle cache accesses from a multiport cache. Therefore, multiple processes, which could be processors, tasks, or threads can access the cache during any cycle. Moreover, the ways of the cache can be allocated to the different processes and then dynamically reallocated based on performance. Most preferably, a relational cache miss percentage is used to reallocate the ways, but other metrics may also be used.

Performance based system and method for dynamic allocation of a unified multiport cache

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Monkton, VT, United States of America

Dana J Thygesen