Maxtor Corporation

Quantum Corporation

Dana Hall

Bruce A Leshay

Lih-Jyh Weng

Haim Bitner

Arnon Friedmann

Christine Imrich

Jim McGrath

A method for transmitting data over a data bus with minimized digital control and data inter-symbol interference. The voltage level on the data bus is not permitted to reach the quiescent negated voltage level set by the bus terminator voltage. Additional time is provided for data detection circuitry to detect a first segment of data transferred over the data bus. A pause time is enabled after the data bus has been idle or paused for a prolonged period. After the first segment of data has been transferred, the method returns to normal operation by pausing for a normal period of time for data detection circuitry to detect subsequent segments of data transferred over the data bus. Additionally, during prolonged synchronous data transfers with unchanged data bits, the data bus is inverted and driven for further regulating the data bus voltage.

Method for transmitting data over a data bus with minimized digital inter-symbol interference

A system determines the multiplicative inverse of A&isin;GF(2 ) by representing A using a selected basis in which basis elements are squares of one another, and performing various operations that involve raising A to powers of 2 as cyclic rotations of A. The system also performs multiplication operations over GF(2 ) or subfields thereof by calculating the coefficients of the product of two elements A and B that are represented using the selected basis as combinations of the coefficients of cyclically rotated versions of A and B. The system further utilizes a relatively small look-up table that contains the multiplicative inverses of selected elements of a subfield of GF(2 ). The system may then cyclically rotate the multiplicative inverse values read from the table to produce the multiplicative inverses of the remaining elements of the subfield. Thereafter, as applicable, the system further manipulates the multiplicative inverse of the subfield element, to produce the multiplicative inverse of the desired element of GF(2 ). Using the selected basis, elements of GF(2 ) that are elements of the subfields have m lowest-order coefficients that are duplicates of the m highest order coefficients. Each element in the look-up table can thus be represented using only m bits, and the table can be entered with m bits.

System for performing multiplication and division in GF(22M)

A method of determining error values including loading an error correction code (ECC) entity having rows representing data symbols, determining an error location for a first row, generating an error syndrome for the first row, determining an erasure constant array from the error location, determining an error location for each of the remaining rows, generating an error syndrome for each of the remaining rows and determining the error values for each of the rows from the corresponding error location and corresponding error syndrome and the constant.

Erasure correction for ECC entities

A bidirectional code decoding method and apparatus is presented. It uses a class of Reed-Solomon codes capable of bidirectional decoding, more specifically, those for which a value of L for a Galois Field element &agr; is chosen as &minus;(R&minus;1)/2 for odd values of R and 2 &minus;R/2 for even values of R. When the symbols of such codes are received at a decoder in a reverse order (from that in which the symbols are normally received) during a reverse directional read, the decoder produces reverse directional syndromes S (&minus;k) and converts the reverse directional syndromes S (&minus;k) to syndromes S(k) by multiplying S (&minus;k) by &agr; for k&equals;L, L&plus;1, . . . , L&plus;R&minus;1. Alternatively, the decoder adjusts error location values for errors occurring in reverse order code word symbols to correspond to error location values that correspond to an error locations that would be determined if the symbols were to be received in the order in which the symbols are normally received.

Bi-directional decodable Reed-Solomon codes

A method and apparatus for Read-After-Write (RAW) verification with error tolerance is disclosed whereby upon read back of data from a medium, the actual read data can be compared to the actual write data, and the number of miscompares between the two can be counted. The severity of the number of miscompares can be determined depending on the Error Control Code (ECC) system used. If the error is correctable by the ECC system, the block need not be re-written to the medium. The invention provides the ability to increase medium capacity and throughput over previous implementations.

Method and apparatus for read-after-write verification with error tolerance

A circuit for monitoring and detecting data transfer protocol errors that occur during asynchronous transfer of data over a data bus. The circuit monitors bus request/acknowledge control lines in accordance with a predetermined handshaking protocol. In the event that an undefined or illegal logic state is detected on the data bus request or acknowledge control lines, the circuit provides an error value to the data sending entity. As a result of receiving this error value, the data sending entity can retry the data transmission over data bus.

Method and apparatus for detecting handshaking protocol errors on an asynchronous data bus

A method of providing error detection information for data transferred between a sender and a receiver interconnected via a bus in a data communication system. The sender transmits data to the receiver on the bus, generates error detection information for the transmitted data, transmits a notification signal to the receiver to indicate start of error detection information transfer, and transmits the error detection information to the receiver on the bus. The receiver generates error detection information for data received from the sender, and compares the receiver generated error detection information to error detection information received from the sender, posting an error condition in case of one or more mismatches.

Method and system for generating and transferring error detection information over a bus

A method and an apparatus for packing variable size user data records into fixed size blocks on a storage medium. The invention includes the steps of receiving user data of variable record lengths along with error detection information; creating a data page for each user data record; building a map entry of record packing information for each data page; and storing each data page and its associated map within the same physical record on a storage medium. The data pages being stored in consecutive order and the map entries are stored in reverse order. A predetermined number of physical blocks are combined to form a logical block and a predetermined number of logical blocks form an entity.

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Hopkinton, MA, United States of America

Dana Hall