Allegro Microsystems, LLC

Dana Briere

Devon Fernandez

Glenn A Forrest

Aaron Cook

Naota Nakayama

An integrated circuit sensor includes circuitry and methods for generating a high speed delay fault test clock signal. A trimmable oscillator generates a master clock signal for use by an output protocol processor to provide the sensor output signal. A fault test clock signal generator is responsive to the master clock signal and to a test trigger signal for generating the test clock signal having a launch pulse and a capture pulse, each having edges substantially coincident with like edges of pulses of the master clock signal and a spacing between launch and capture pulses established by the trimmable master clock signal.

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Bedford, NH, United States of America

Dana Briere