Cypress Semiconductor Corporation

Dan Zupcau

Eric N Mann

Babak A Taheri

Marc D Hartranft

Thurman John Rodgers

Steven C Meyers

Leo Luquette

A circuit includes first logic that generates a first signal suitable to activate at least one ESD clamp in response to an electrostatic discharge (ESD) event having a first severity or a second severity higher than the first severity, and second logic that generates a second signal suitable to activate the ESD clamp in response to the ESD event having the second severity, the second signal time multiplexed with the first signal.

ESD trigger for system level ESD events

An electrostatic discharge (ESD) detector is coupled to the input voltage, and includes a voltage modulated input capacitance Cj configured to decrease as the input voltage increases. An output pulse generator is coupled to an output of the detector, and configured to amplify the output of the detector. An ESD protection switch is coupled to turn on upon application of an output pulse from the output pulse generator.

Diode based ESD triggers

An improved ESD protection device, integrated circuit and method for programmably altering a sensitivity of the ESD protection device is provided herein. More specifically, an active shunt ESD protection device is provided with an improved trigger circuit design. The improved trigger circuit design enables the sensitivity of the ESD protection device to be altered by providing a variety of programmable elements for adjusting an RC time constant of a slew rate detector contained therein. The programmable elements allow the RC time constant to be altered at the wafer or package level, and avoid the significant time and cost typically associated with conventional trial-and-error adjustment procedures.

Programmable electrostatic discharge (ESD) protection device

A bandgap circuit comprising a current generation circuit and a current replication circuit is provided herein. The output current of the current generation circuit is generated as a weighted sum of two currents. The circuit configuration of the current generation circuit allows it to function at low power supply voltages, e.g., on the order of 1 V. The current replication circuit includes an operational amplifier, which when configured in conjunction with MOS cascode current sources and the current generation circuit, significantly increases the accuracy and insensitivity to power supply noise of the bandgap circuit output current. A resistor may be included between the bandgap circuit output node and ground for generating a reference voltage with increased accuracy and insensitivity to power supply noise.

High PSRR, high accuracy, low power supply bandgap circuit

A circuit () can include a first section () that can provide a designated function within an integrated circuit device that can be altered due to current injection at a node (). A mirror section () can mirror the effects of current injection on one or more devices within first section () and generate an output indication INJ_EFF representing such effects. In one very particular arrangement, detection of an injected current can be used to prevent false triggering of a switched electrostatic discharge (ESD) current path.

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Starkville, MS, United States of America

Dan Zupcau