Dupont Photomasks, Inc.

Dan Rittman

Micha Oren

A system and method for correcting connectivity errors in a mask layout are disclosed. The method includes comparing a first connection in a mask layout file to a second connection in a schematic netlist. A connectivity error is identified if the first connection does not match the second connection and the identified connectivity error is automatically corrected in the mask layout file.

System and method for correcting connectivity errors in a mask layout file

A photomask and method for eliminating design rule violations from the photomask are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by comparing a feature dimension in a mask layout file with a design rule in a technology file, identifying a design rule violation if the feature dimension is less than the design rule and automatically correcting the identified design rule violation in the mask layout file.

Photomask and integrated circuit manufactured by automatically correcting design rule violations in a mask layout file

A photomask and integrated circuit manufactured by eliminating design rule violations during construction of a mask layout block are disclosed. A photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a selected position for a polygon in a mask layout block, identifying a design rule violation in the mask layout block if the selected position is less than a design rule from a technology file, and automatically preventing the polygon from being placed in the mask layout block at the selected position if the design rule violation is identified.

Photomask and integrated circuit manufactured by automatically eliminating design rule violations during construction of a mask layout block

A system and method for eliminating design rule violations during construction of a mask layout block are disclosed. The method includes analyzing a selected position for a polygon in a mask layout block and obtaining one or more design rules associated with the polygon from a technology file. The method provides a hint area associated with the selected position for the polygon that graphically represents a space in the mask layout block where the selected position complies with the design rule violation.

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Foster City, CA, United States of America

Dan Rittman