Intel Corporation

Dan J Williams

Annie Foong

Bryan E Veal

Mohan J Kumar

Sanjeev N Trika

Murugasamy K Nachimuthu

Ashok Raj

Narayan Ranganathan

Sivakumar Radhakrishnan

Chet R Douglas

Deepak Gandiga Shivakumar

Tiffany J Kasanicky

Vishal Verma

Krzysztof Rusocki

Nicholas Moulin

Systems, apparatuses and methods may provide for technology that exchanges activation information between system firmware and an operating system (OS), wherein the activation information includes one or more of status information, activation state information, capability information, activation time information or quiesce time information. The technology also conducts a runtime upgrade of the device firmware based on the activation information, wherein the runtime upgrade bypasses a reboot of the computing system.

Interface and warm reset path for memory device firmware upgrades

Embodiments include a method to determine whether to dynamically remap an in-process update of a first page of memory to a second page of memory. When a dynamic remap is determined, the method causes a pause of the in-process update to the first page of memory by one or more bridges, draining of in-process direct memory access (DMA) operations, and redirecting the update to the second page of memory.

Dynamically remapping in-process data transfers

In one embodiment, a block data transfer interface employing offload data transfer engine in accordance with the present description includes an offload data transfer engine executing a data transfer command set to transfer a block of data in a transfer data path from a source memory to a new region of a destination memory, wherein the transfer data path bypasses a central processing unit to minimize or reduce involvement of the central processing unit in the block transfer. In response to a successful transfer indication, a logical address is re-mapped to a physical address of the new region of the destination memory, instead of a physical address of the original region of the destination memory. In one embodiment, the re-mapping is performed by a central processing unit. In another embodiment, the re-mapping is performed by the offload data transfer engine. Other aspects are described herein.

Offload data transfer engine for a block data transfer interface

One embodiment provides a computing device. The computing device includes a processor; a chipset; a memory; and indirection logic. The indirection logic is to receive a host logical block address (LBA) associated with a first sector of data, map the host LBA from a host address space to a first device LBA in a device address space, the device address space related to a non-volatile memory (NVM) storage device physical memory address space, and provide the first sector of data and the first device LBA to the NVM storage device.

Host-managed non-volatile memory

Provided are a computer program product, system, and method performing an atomic write operation across multiple storage devices. A determination is made of a plurality of storage devices on which to write data for a write operation. A tag is generated to uniquely identify the write operation. A write command is sent to each of the determined storage devices including the tag and write data to cause each of the storage devices to write the write data at the storage device. Each of the storage devices maintains a copy of a previous version of the data to be updated by the write operation. A revert command is sent with the tag to one of the storage devices to cause the storage device to restore the copy of the previous version of the write data at the storage device.

Performing an atomic write operation across multiple storage devices

Growing community of inventors

Forest Grove, OR, United States of America

Dan J Williams