National Semiconductor Corporation

Signetics

Dan Ion Hariton

Ronald Pasqualini

Prasanna Manhar Shah

An electrostatic discharge (ESD) protection circuit includes circuitry for providing protection against ESD events which occur either within an ESD pad ring (intra-ring) or between different ESD pad rings (inter-ring). Self-triggering voltage clamp circuits or back-to-back diode circuits can be used to properly interconnect the positive polarity rails and the negative polarity rails of the ESD pad rings. Self-triggering voltage clamp circuits are advantageous in that they provide improved ac signal isolation (i.e. reduced noise coupling between the ESD pad rings, and thus reduced noise coupling from the digital I/O pads to the analog I/O pads).

Low noise electrostatic discharge protection circuit for mixed signal

A structure is provided to create a voltage-independent capacitive structure using a typical MOS fabrication process. The capacitive structure includes two FET devices connected in series by having their source, drain, and body terminals all coupled together into a common node. A biasing circuit that includes a current generator and a current mirror biases the common node so that a constant capacitance is maintained across the gate terminals of the two serially connected FET devices, independent of the applied voltage.

Floating MOS capacitor

A compensated, bias-dependent signal filtration and amplification circuit includes a low-pass RC filter with a bias-dependent frequency response caused by the use of MOS transistors connected as capacitors with bias-dependent capacitances. A dc current source is used, in cooperation with the resistors of the RC filter, to generate a fixed bias for the capacitor-connected MOS transistors and thereby eliminate the bias dependencies of the capacitances. Following amplification of the filtered signal, another dc current is subtracted out from the amplified output signal so as to eliminate any residual dc signal components due to the input compensation dc bias signal, thereby leaving only the amplified filtered ac signal components.

Compensated, bias-dependent signal filter and amplifier circuit

A transceiver system for high speed, low bit-error rate data communications over a.c. power lines in the presence of repetitive impulse noise includes an a.c. power line coupling network, a power line communications modem, and a microprocessor with a memory and a programmed avoidance algorithm. The a.c. line coupling network includes a zero crossing circuit to detect the start of each a.c. cycle; a transient-voltage limiting front end to detect impluse noises above a threshold and minimize ringing, and a timing circuit to determine the time and duration of each impulse in each sampled a.c. cycle. The microprocessor records the start and stop times of impulses, repetitively scans several a.c. cycles and determines whether or not the impulses are periodic. For periodic impulses, the microprocessor blocks communication on the modem during the impulses, enabling the transceiver to transmit and receive between impulses.

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Pinole, CA, United States of America

Dan Ion Hariton