Sandisk Il Ltd.

Sandisk Technologies Inc.

Dan Inbar

Ori Stern

Shahar Bar-Or

Alon Marcu

Yigal Eli

Meir Avraham

Ziv Paz

Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup. Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells of the memory device as conventional SBC cells or as unconventional MBC cells. After the storage device is embedded in a host device, the programmer's data, or selected parts thereof, is read from the memory device and rewritten into it by operating selected memory cells of the memory device as conventional MBC cells.

Preloading data into a flash storage device

Programmer's data that is transferred from a programming device () to a storage device () is initially stored in a memory device () of the storage device () by using a durable data-retention storage setup (). After the storage device is embedded in a host device (), the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup (). Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells () of the memory device as conventional single-bit per cell (SBC) cells or as unconventional multi-bit per cell (MBC) cells. After the storage device () is embedded in a host device (), the programmer's data, or selected parts thereof, is read from the memory device () and rewritten into it by operating selected memory cells () of the memory device as conventional MBC cells.

A method of executing reading instruction to read host data from a flash memory device is provided. The method initiates with receiving from a host device a read instruction to read host data from an array of NAND flash memory cells grouped into separately-readable device pages, the host data being a portion of device data that is stored in a device page. The host data is parsed from device data, and the parsed host data is sent to the host device.

Controller for one type of NAND flash memory for emulating another type of NAND flash memory

A method of executing an erasing instruction to erase host data from a flash memory device is provided. The method initiates with receiving from a host device an erase instruction to erase host data from an array of NAND flash memory cells grouped into separately-erasable device blocks, each device block including multiple device pages, the host data being a portion of device data that is stored in a device block. The host data is marked as erased, and a message is sent to the host device indicating that the host data has been erased.

A controller for one type of NAND flash memory device that emulates another type of NAND flash memory device. The controller may include a host NAND interface to receive host data from a NAND host device, and a data aggregator for aggregating the host data with complementary data, to thereby create device data that is storable in a device page of an array of NAND flash memory cells of the NAND flash memory device. After creating the device data the controller writes the device data into a device page of the NAND flash memory cells. The controller also includes a data parser to parse host data from device data when data read operations are executed by the controller. If required, the controller uses the data parser to parse complementary data from device data to create device data when data writing operations are executed by the controller.

A memory device includes two dies. A first memory is fabricated on one die. A controller of the first memory is fabricated on the other die. Also fabricated on the other die is another component, such as a second memory, that communicates with a host system using a plurality of signals different from the signals used by the first memory. The device includes a single interface for communicating with the host system using only the respective signals of the second component. In a most preferred embodiment, the first memory is a NAND flash memory and the second memory is a SDRAM.

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Yehud, Israel

Dan Inbar