Intel Corporation

Dan Froelich

Debendra Das Sharma

Su Wei Lim

Michelle C Jen

Bruce A Tennant

Quinn Devine

An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.

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Portland, OR, United States of America

Dan Froelich