Richtek Technology Corporation

National Taiwan University

Richtek Technology Corporation, R.o.c

Rickhtek Tecnology Corp.

Richlek Technology Corp.

Dan Chen

Wei-Hsu Chang

Ching-Jan Chen

Yu-Cheng Lin

Chen-Hua Chiu

Kuo-Lung Tseng

Chean-Lung Tsay

Chun-Shih Huang

Yu-Kuang Wu

Yen-Tang Wang

Chung-Ping Ku

Chih-Yuan Liu

Hsien-Yi Tsai

Bo Yi Chiu

Hong-Chun Li

Yu Cheng Lin

A multi-phase buck converter has a digital compensator to select a set of compensation coefficients depending on the operating phase number of the multi-phase buck converter, or including different compensators for each operation phase number to improve the loop gain bandwidth, transient response and stability of the multi-phase buck converter. The multi-phase buck converter operates with more phase circuits for higher loading and operates with fewer phase circuits for lower loading. The compensation varies with the number of the operated phase circuits so to be adaptive to the operation condition with an optimized control-to-output voltage transfer function.

Operating phase number dependent compensation of a multi-phase buck converter

For a multiphase interleaved voltage regulator, an offset cancellation circuit is applied for each phase separately. The current loop gain of each phase is thus increased to mitigate the beat-frequency oscillation in phase currents when the beat frequency is below the bandwidth of the low-pass filter in the offset cancellation circuit, without introducing additional instability issue that is the drawback of increasing current-sensing gain.

Using offset cancellation circuit to mitigate beat-frequency oscillation of phase currents in a multiphase interleaved voltage regulator

A control circuit and method for controlling a power converter comprises an adder, a digital compensator, and a pulse width modulation circuit. The adder acquires an output voltage difference between the output voltage and the reference output voltage. The digital compensator, which has a Z-domain transfer function, references the output voltage difference to generate a pulse width control signal with the least significant bits of the denominator coefficient in the Z-domain transfer function being regulated to achieve the load line function of the power converter. Further, the pulse modulation circuit is controlled by the pulse width control signal to generate the pulse width modulation signal to control ON/OFF of the power converter.

Control circuit and method for a power converter controlling adaptive voltage position

An easy LSB tuning method is proposed for a digitally controlled DC-DC converter to increase the DC gain of the digitally controlled DC-DC converter under conditions of no-limit-cycle and a finite bit number to reduce steady-state error of the digitally controlled DC-DC converter. The LSB of one or more of the coefficients in the denominator of the discrete-time domain transfer function of the digital compensator in the digitally controlled DC-DC converter is so tuned that the sum of all coefficients in the denominator of the discrete-time domain transfer function becomes zero. Therefore, the influence of round-off effect on the coefficients of the digital compensator is mitigated.

DC gain improvement of a digitally controlled DC-DC converter by LSB tuning

The present invention discloses a multi-phase power converter, and a control circuit and a control method of the multi-phase power converter. The multi-phase power converter comprises multiple power conversion phases. The method comprises: determining whether to enter a phase-shedding mode; at a first time when entering the phase-shedding mode, disabling at least one of the power conversion phases; and at another time when entering the phase-shedding mode, disabling at least another one of the power conversion phases.

Multi-phase power converter and control circuit and method thereof

In an interleaving power factor corrector, a control device interleavingly drives first and second converting circuits such that the power factor corrector generates a voltage output (Vo), and includes first and second control modules generating respectively first and second driving signals (Q_master, Q_slave) that correspond respectively to first and second control signals for controlling operations of power switches of the first and second converting circuits. A phase modulating module generates a reset signal (S_PTCL) based on an inverted first driving signal (Qn_master) and a feedback compensation signal (Vcomp) outputted by the first control module, and a reset signal (S_syn) outputted by the second control module. When one of the reset signals (S_syn, S_PTCL) has a predetermined level, the second driving signal (Q_slave) has a level for switching the power switch of the second converting circuit to an OFF-mode.

Control device for an interleaving power factor corrector

A control circuit and control method for a power converter detects change of the output voltage of the converter, and performs the time-optimal control function when the change exceeds the default value. According to the voltage slew rate detected at the time of the change exceeding the default value, a time interval Tfrom the change exceeding the default value being detected to the current of the inductor rising to be the same as the output current of the converter is estimated, and the time intervals Tand Tare figured out based on the time interval T. The parasitic resistance of the output capacitor of the converter is taken into account during estimating process such that even if the output capacitor has larger parasitic resistance, the output voltage can be back to the steady state value accurately to avoid the time-optimal control being triggered repeatedly.

Control circuit and method for a power converter

A method for designing a digital compensator for a switching mode power supply is provided such that the digital compensator has complex conjugated zero pair or a right hand pole to eliminate the complex conjugated pole pair or right hand zero in the transfer function of the control-to-output voltage of the switching mode power supply.

Digital compensator design method and digital compensator for a switching mode power supply

In a power factor corrector including a PWM switch to switch a line current generated from a line voltage to charge a boost capacitor to thereby generate an output voltage, a piecewise on-time modulation apparatus and method comprise comparing a line voltage dependent voltage with an output voltage dependent voltage to generate a comparison signal to determine the on-time of the PWM switch. When the line voltage is lower than a threshold, the on-time of the PWM switch varies with the line voltage, and when the line voltage is higher than the threshold, the on-time of the PWM switch is constant.

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Taipei, Taiwan

Dan Chen