Fairchild Semiconductor Corporation

Dan Calafut

Steven Paul Sapp

Ashok Challa

Ihsiu Ho

Suku Kim

Dan Kinzer

Mark Larsen

Seokjin Jo

Semiconductor devices and methods for making such devices that contain a 3D channel architecture are described. The 3D channel architecture is formed using a dual trench structure containing with a plurality of lower trenches extending in an x and y directional channels and separated by a mesa and an upper trench extending in a y direction and located in an upper portion of the substrate proximate a source region. Thus, smaller pillar trenches are formed within the main line-shaped trench. Such an architecture generates additional channel regions which are aligned substantially perpendicular to the conventional line-shaped channels. The channel regions, both conventional and perpendicular, are electrically connected by their corner and top regions to produce higher current flow in all three dimensions. With such a configuration, higher channel density, a stronger inversion layer, and a more uniform threshold distribution can be obtained for the semiconductor device. Other embodiments are described.

3D channel architecture for semiconductor devices

Growing community of inventors

San Jose, CA, United States of America

Dan Calafut