International Business Machines Corporation

Damir Anthony Jamsek

Kanak Behari Agarwal

Andrew Kenneth Martin

Daniel Frank Moertl

Robert Edward Galbraith

Sridhar R Muppidi

Ronald B Williams

George Robert Blakley, Iii

Kimberly DaShawn Simon

Diana Jeanne Arroyo

Sani Richard Nassif

Michael A Paolini

Robert Brett Tremaine

Jian Li

Christopher J Craik

Charalampos Pozidis

Bulent Abali

Chin Ngai Sze

Emrah Acar

H Peter Hofstee

Hubertus Franke

Harm Peter Hofstee

Anne Elizabeth Gattiker

Rick A Weckwerth

Joerg-Stephan Vogt

Reiner Rieke

Steven Paul Norgaard

Marcio Augusto Silva

Jeremy T Ekman

Gunnar Von Boehn

Gerald Mark Grabowski

Abby Harrison

Nikolaos Papandreou

Thomas Mittelholzer

Zhuo Li

Charles Jay Alpert

Charles John Camp

Matthias Klein

Kevin John Nowka

William Evan Speight

Ashutosh Misra

Shayak Banerjee

Ying Zhou

Milos Stanisavljevic

Preetham M Lobo

Thomas Henry Osiecki

Matthew Szekely

Mussie T Negussie

Tom Osiecki

Maysam Mir Ahmadi

Min-Yu Tsai

Methods, computer program products, and/or systems are provided that perform the following operations: determining a pacing requirement for host requests based on one or more thresholds; setting a pacing delay level based on the one or more thresholds in response to the determination of the pacing requirement; and implementing a memory request flow for a host request based on the pacing requirement and the pacing delay level.

Host request pacing to balance resources and throughput

A memory system and method for storing data in one or more storage chips includes: one or more memory cards each having a plurality of storage chips, and each chip having a plurality of dies having a plurality of memory cells; a memory controller comprising a translation module, the translation module further comprising: a logical to virtual translation table (LVT) having a plurality of entries, each entry in the LVT configured to map a logical address to a virtual block address (VBA), where the VBA corresponds to a group of the memory cells on the one or more memory cards, wherein each entry in the LVT further includes a write wear level count to track the number of writing operations to the VBA, and a read wear level count to track the number of read operations for the VBA mapped to that LVT entry.

Logical to virtual and virtual to physical translation in storage class memory

In an approach to NV SCM data flow with mismatched block sizes, responsive to receiving a command from a host on a memory controller for a storage class memory, whether the command is a write command is determined. Responsive to determining that the command is the write command, the command is inserted into a first buffer. Responsive to the command exiting the first buffer, whether the command generates a cache hit from the internal cache is determined. Responsive to determining that the command generates the cache hit, the write data is written into the internal cache. Responsive to determining that the command does not generate the cache hit, whether an oldest page in the internal cache is dirty is determined. Responsive to determining that the oldest page in the internal cache is dirty, a modified oldest page is written to the internal cache and a second buffer.

Non-volatile storage class memory data flow with mismatched block sizes

A linear system solving method, system, and computer program product, include calculating a matrix factorization for a matrix in a pair of matrices, in a form of a lower, a diagonal, an upper (LDU) decomposition, solving a first expression for a first value using a substitution module to create a first result, dividing the first result by values stored in the diagonal of the matrix to obtain a second result, and solving a second expression for a second value where a processing of the diagonal is skipped by using the second result.

System, method and computer program product for dense/sparse linear system solver accelerator

Compression of data is facilitated by locating matches within the data to be compressed. A first technique is used to determine whether there is at least one matching string in the data to be compressed, and a second technique, different from the first technique, is used to determine whether there is at least one matching record in the data to be compressed. Based on there being at least one matching string in the data to be compressed, at least one indication of the at least one matching string is provided to an encoder to facilitate compression of the data. Further, based on there being at least one matching record in the data to be compressed, at least one indication of the at least one matching record is provided to the encoder to facilitate compression of the data. It is transparent to the encoder whether the first technique or the second technique is used to provide one or more matches.

Record-based matching in data compression

A method and system for collecting diagnostic data from a storage class memory chip is disclosed. The method includes performing a scrub process on at least a portion of the storage class memory by: removing the portion of the storage class memory from use, wherein the portion comprises a plurality of memory locations, executing a first write operation to write a first pattern on each of the plurality of memory locations, executing a first read operation to obtain a first set of data written on each of the plurality of memory locations, analyzing the first set of data written on each of the plurality of memory locations to determine the number of stuck-at faults in the portion, and updating one or more counters in an error rate table (ERT) to indicate the number of stuck-at faults.

Scrub management in storage class memory

Techniques that facilitate hybrid memory access frequency are provided. In one example, a system stores access frequency data for storage class memory and volatile memory in a translation lookaside buffer. The access frequency data is indicative of a frequency of access to the storage class memory and the volatile memory. The system also determines whether to store data in the storage class memory or the volatile memory based on the access frequency data stored in the translation lookaside buffer.

Hybrid memory access frequency

A memory system and method for storing data in one or more storage chips is disclosed. The memory system includes one or more storage dies included in each storage chip and a controller. Each of the plurality of storage dies further comprises one or more media replacement unit (MRU) groups. The controller includes a translation module, the translation module further comprising: a chip select table (CST) configured to identify one or more valid storage chips during translation for performing a read/write operation, and a media repair table (MRT) corresponding to each of storage chips, each MRT configured to identify one or more storage dies during translation for performing a read/write operation.

Virtual to physical translation and media repair in storage class memory

Techniques for persisting a logical address-to-virtual address table in a solid state storage device are presented. An example method includes receiving a request to write data to a logical block address (LBA) in a memory component of the solid state storage device. The data is written to a location identified by a virtual block address (VBA) in the solid state storage device. The VBA is stored in a rotating dump table in a reserved logical unit of the solid state storage device. A mapping between the LBA and the VBA is stored in a rotating journal table located in the reserved logical unit. The rotating journal table is buffered such that a number of journal entries are stored in a buffer until a threshold number of journal entries are committed to the rotating journal table. A pointer to a current address in the rotating journal is stored in the buffer.

Persistent logical to virtual table

Simulating particle beam interactions includes identifying a set of n functions F, F, . . . , Fcorresponding to a plurality of different physical aspects of a particle beam, performing simulations of each Fusing a full physics model, selecting for each Fa distribution function fthat models relevant behavior and reducing computation of the full physics model for each Fby replacing Fwith a distribution function f. The computation reduction includes comparing a set of simulations wherein each freplaces its respective Fto determine if relevant behavior is accurately modeled and selecting one of for Ffor each n, for a Monte Carlo simulation based on a runtime and accuracy criteria.

Fast and accurate proton therapy dose calculations

A method and system are provided. The method includes condensing, by a processor, an original voxel-beamlet matrix stored in a memory device into a reduced dataset for proton beam simulation and therapy. The original voxel-beamlet matrix has a row for each of a plurality of voxels in a three-dimensional patient volume and a column for each of a plurality of radiation beamlets. The condensing step includes determining protobeams to be extracted from the original voxel-beamlet matrix. The protobeams are columns (i) selected from the original voxel-beamlet matrix based on comparisons performed between the columns in the original voxel-beamlet matrix or (ii) created by combining at least some of the columns in the original voxel-beamlet matrix, in a matrix condensing process. The condensing step further includes extracting the protobeams from the original voxel-beamlet matrix. The condensing step also includes storing the protobeams as the reduced dataset in the memory device.

Extracting protobeams for cancer radiation therapy

A hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according to block-specific compression configuration information. The hardware accelerator identifies a commit point that is based upon an interruption of a first decompression session of the data stream and corresponds to one of the deflate blocks. As such, the hardware accelerator configures a decompression engine based upon the corresponding deflate block's configuration information and, in turn, recommences decompression of the data stream at an input bit location corresponding to the commit point.

Efficient context save/restore during hardware decompression of DEFLATE encoded data

Growing community of inventors

Austin, TX, United States of America

Damir Anthony Jamsek