Quickturn Design Systems, Inc.

Dam Van Bui

Stephen Paul Sample

Wei-Jin Dai

Tao Shinn Chen

Joseph Varghese

Louis Galbiati, Iii

A configurable method and apparatus for implementing the various large memory instances commonly found in a user's design in a hardware logic emulation system is disclosed. No external boards or systems are required to implement typical memory instances. The method and apparatus sorts the memory instances in the user's input design, packing as many memory instances as possible into a physical RAM on the emulation boards. The method also counts the number of physical RAMs necessary to implement the plurality of memory instances. The method maps the memory instances into physical RAMs, and routes the address, data and control signals and controller circuit into a programmable logic chip.

Method and apparatus for configurable memory emulation

An emulation system and method that reduces or eliminates the number of timing errors such as hold time violations when implementing a netlist description of an integrated circuit. The emulation system comprises a plurality of reprogrammable logic circuits and a plurality of reprogrammable interconnect circuits. The netlist description is optimized to reduce the number of timing violations by removing the occurences of gated clocks from the netlist, partitioning the netlist description by taking into account the occurence of timing violations and ensuring that retain state nets are implemented properly.

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Milpitas, CA, United States of America

Dam Van Bui