Beijing Boe Technology Development Co., Ltd.

Boe Technology Group Co., Ltd.

Duosi Software Co., Ltd.

Dali Liu

Kui Liang

Fan Li

Shuo Zhang

Liye Duan

Jiangbo Chen

Xiaohui Liu

Hu Meng

Chiachiang Lin

Da Li

The present disclosure provides a flat panel detection substrate, a fabricating method thereof and a flat panel detector. The flat panel detection substrate according to the present disclosure includes a base substrate; a bias electrode and a sense electrode on the base substrate; and a semiconductor layer over the bias electrode and the sense electrode, the semiconductor layer having a thickness greater than 100 nm.

Flat panel detection substrate, fabricating method thereof and flat panel detector

A flat panel detector includes a base substrate, a sensing electrode and a bias electrode over the base substrate, and an insulating layer over the sensing electrode and the bias electrode at a side distal from the substrate. A difference between thicknesses of regions of the insulating layer corresponding to the sensing electrode and the bias electrode respectively is not greater than a preset threshold. When a sufficiently high voltage is applied to the insulating layer and turned on, because the thickness thereof is relatively uniform, a dark current generated by the sensing electrode and the bias electrode under the insulating layer is relatively uniform, thereby improving detection accuracy of the flat panel detector.

Flat panel detector and manufacturing method thereof

The present invention relates to a macro instruction set computer (MISC) architecture having main memory for storing system softwares of the computer, instructions, and user programs; first memory for storing preparatory data for operations, intermediate results of operations and the final results of completed operations, and operating in stack form; second memory for storing the break point address of subprograms and address for recovery of the break point while returning from a call, and operating in stack form; a CPU having: address management for the main memory; main memory data port for receiving instructions and data from main memory and writing data in the CPU into main memory; control logic combinational decoding for decoding instructions from main memory and generating control signals controlling the operations of the computer; ALU for performing arithmetic and logic operation functions; top of stack, next to the top of stack and the third one to the top of stack register of the first memory; top of stack register and instruction repeating execution control of the second memory; management device for the first and second memory for performing operations of writing to and reading from the first and second memory.

Macro instruction set computer architecture

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Beijing, China

Dali Liu