Freescale Semiconductor,inc.

Nxp USA, Inc.

Dale John McQuirk

Miten H Nagda

Michael Todd Berens

Jose A Camarena

James Robert Feddeler

Andre Luis Vilas Boas

Michael A Stockinger

Simon Gallimore

Nidhi Chaudhry

Stefano Pietri

Mohit Arora

Chris C Dao

Charles Eric Seaberg

Khoi Mai

Prashant Bhargava

Richard Titov Lara Saez

George E Baker

Kenneth P Tumin

Michael A Bourland

Richard Saez

Matthew G Stout

A regulator includes an error amplifier with a first input coupled to receive a reference voltage and a second input coupled to receive a feedback signal. A driver transistor provides an output voltage of the regulator that powers a memory. A replica transistor provides a replica voltage that powers a replica of the memory. A first ratio of a size of the replica of the memory to a size of the memory is less than one, and a second ratio of a drive strength of the replica transistor to a drive strength of the driver transistor is less than one. Each of the first ratio and the second ratio is at most 1/500. Switching circuitry provides one of the output voltage or the replica voltage as the feedback signal to the error amplifier.

Low power memory state retention regulator

An integrated circuit includes a power switch coupled between a first voltage supply node and an internal voltage supply node and a switch control circuit coupled to a control electrode of the power switch. The switch control circuit includes a driver circuit coupled between a second voltage supply node and a third voltage supply node, a pass-gate having a first node coupled to an output of the driver circuit and a second node coupled to the control electrode of the power switch, a pull-up transistor having a first current electrode coupled to the first voltage supply node, a second current electrode coupled to the control electrode of the power switch, and a bias circuit having a bias output configured to provide a higher voltage between the first and second power supply nodes as a bias voltage to a body electrode of the pull-up transistor.

Switch control circuit for a power switch with electrostatic discharge (ESD) protection

A first voltage scaling power switch is coupled to a first power supply terminal for providing power to a first circuit portion, and a second voltage scaling power switch is coupled between the first power supply terminal providing power to a second circuit portion. A common power rail is coupled the first and second power input nodes during respective voltage scaling modes of the first and second circuit portions. A feedback circuit coupled to the common power rail provides a feedback signal to a control input of the first voltage scaling power switch to regulate a voltage provided by the first power switch, and to a control input of the second voltage scaling power switch to regulate a voltage provided by the second voltage scaling power switch.

Circuit with multiple voltage scaling power switches

A voltage regulator circuit that regulates voltage on an output node that provides power to a load circuit having varying current draw. A feedback voltage from the output node is compared to reference voltages. In response to the comparisons, pull-up/down circuits are applied to a gate-control node connected to the gate of a pass transistor. The voltage of the gate-control node is adjusted by integrating current from the pull-up/down circuits. In response to the feedback voltage being between the first and second reference voltages, the voltage on the gate-control node is maintained by disabling the pull-up/down circuits at the gate-control node.

Voltage regulator

A voltage regulator has an output driver current mirror circuit and one or more control circuits. The output driver current mirror circuit includes an output driver transistor, a tunable resistance circuit, and a diode-connected transistor. The output driver transistor has one current electrode coupled to a supply voltage and another current electrode coupled to an output terminal for providing the output voltage of the voltage regulator. The tunable resistance circuit has one terminal coupled to a control electrode of the output driver transistor, and another terminal coupled to a current electrode of the diode-connected transistor. The one or more control circuits includes a comparator for controlling a current provided to the output driver current mirror in response to a feedback signal from the output terminal.

Tunable voltage regulator circuit

A determination is made if a temperature of a system has exceeded a hot threshold or a cold threshold. At room temperature, a first adjustment is determined for first nominal settings. The first nominal settings are for a first input to a first comparator. At room temperature, a second adjustment is determined for second nominal settings. The second nominal settings are for a first input to a second comparator. The temperature is monitored, during normal operation of the system, using a temperature dependent voltage with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.

Systems and methods for calibrating a temperature detection module

A voltage regulation system includes a voltage regulator configured to output a control signal indicating whether a voltage based on output of the voltage regulator is lower than a specified value. A charge pump is configured to output a voltage and a charging current. A pump monitor is configured to receive the control signal and the output voltage of the charge pump, and activate the charge pump when the control signal indicates the voltage based on output of the voltage regulator is lower than a specified value and the output voltage of the charge pump is lower than a threshold value.

Charge pump LDO with secondary sensing for low power need based refresh

A processing system includes a processor and a temperature security module coupled to provide a temperature tamper signal to the processor. The temperature security module includes a shelf mode trim value, an operating mode trim value, and a programmable temperature trim value. One of the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value, is used based on a deployment mode of the processing system to set a temperature monitor trim value.

Data processing system with temperature monitoring for security

A tunable clock circuit has a dual overlapping digital to analog converter (DAC) and an oscillator. The dual overlapping DAC provides a first output selectable with a first resolution and a second output selectable with a second resolution. The first resolution is different from the second resolution. The oscillator has a first input coupled to the first output of the dual overlapping DAC, a second input coupled to the second output of the dual overlapping DAC, and an output providing a clock output signal.

Temperature-compensated high accuracy clock

A clock doubler circuit includes a filtering circuit. The filtering circuit includes a first input to receive a first clock signal, a first output to provide a second clock signal, and a second output to provide a third clock signal. The third clock signal is a complementary signal to the second clock signal. The first clock signal, the second clock signal, and the third clock signal are at a first clock frequency. The second clock signal is a low pass filtered version of the first clock signal. The clock doubler circuit includes a frequency doubling circuit. The frequency doubling circuit includes a first input to receive the second clock signal and a second input to receive the third clock signal. The frequency doubling circuit includes an output node. The output node provides a fourth clock signal at a second clock frequency that is twice the first clock frequency.

Clock doubling circuit and method of operation

A timer to provide pulses at a comparator output wherein a frequency of the pulses is dependent on temperature, wherein providing each pulse includes biasing a first input of the comparator at a voltage and operating a transistor in a subthreshold region of operation to change the voltage of the first input of a comparator at a rate dependent upon temperature. The output of the comparator changes state when the voltage of the first input crosses a voltage of a second input of the comparator.

Temperature dependent timer circuit

An IC provides tracking between multiple regulated voltages. The IC includes, a voltage reference circuit, a voltage multiplier circuit, and first and second voltage regulator circuits. The voltage reference circuit generates a first reference voltage. The first voltage regulator circuit generates, at a first terminal of a first output transistor, a first regulated voltage that is based on the first reference voltage. The voltage multiplier circuit generates a second reference voltage from an equivalent of the first reference voltage. The second voltage regulator circuit generates, at a first terminal of a second output transistor, a second regulated voltage that is based on the second reference voltage. At least one terminal of the second output transistor is capacitively coupled to the first terminal of the first output transistor.

Method and integrated circuit that provides tracking between multiple regulated voltages

An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.

Integrated circuit having latch-up recovery circuit

A device includes a comparator, and a selection circuit coupled to the inputs of the comparator. The selection circuit receives reference voltages and a variable voltage. In a normal operation mode, the selection circuit provides the variable voltage and a selected reference voltage to the comparator and the comparator provides an indication based on the variable voltage. In a test mode, the selection circuit provides a first selected reference voltage and a second selected reference voltage to the comparator for determining a switching offset voltage of the comparator.

Circuit and method for determining comparator offsets of electronic devices

An overvoltage protection circuit may include a reference voltage generator, a trigger circuit, and a clamping device. The reference voltage generator is for providing a reference voltage that is relatively constant during a powered EOS/ESD event. The trigger circuit is coupled to receive the reference voltage and a power supply voltage. The trigger circuit is for comparing the reference voltage to the power supply voltage. In response to detecting that the power supply voltage is above the reference voltage, the trigger circuit provides a trigger signal having a voltage proportional to a voltage level of the overvoltage event. The clamping device is coupled between a first power supply terminal and a second power supply terminal. The clamping device is for providing a current path between the first and second power supply terminals in response to the trigger signal.

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Austin, TX, United States of America

Dale John McQuirk