Western Digital Technologies, Inc.

Western Digital Corporation

Dale Charles Main

Dean Mitcham Jenkins

Abhilash Ravi Kashyap

Kroum Stanimirov Stoev

A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.

Read disturb compensation using weighted programming patterns

A device comprises control circuitry including a processor, a memory interface, memory interface initialization circuitry, and non-volatile storage storing initialization parameters for initializing the memory interface. The control circuitry is configured to, while the processor is held in reset, initialize the memory interface using the initialization parameters and the memory interface initialization circuitry, after the memory interface has been initialized, receive instructions from a non-volatile memory module over the memory interface, and, after the processor has been released from reset, execute the instructions using the processor.

Memory interface initialization with processor in reset

A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.

Host configured multi serial interface device

Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured to receive a temperature signal from the temperature sensor indicating a temperature of at least a portion of the data storage device, determine that the temperature is below a first predetermined threshold, activate the heating device to increase the temperature of the at least a portion of the data storage device, and write data associated with a write command to the non-volatile solid-state memory.

Temperature-based data refreshing

Systems and methods are disclosed for monitoring object storage in a data storage system. A storage device tray assembly includes a plurality of data storage bays configured to receive data storage devices, a plurality of data storage devices mounted in the plurality of data storage bays, and an interface expander device communicatively coupled to each of the data storage devices over a first communication interface. The interface expander device may include non-volatile memory storing object storage monitor code and operating system code, and one or more processors configured to perform port or switch initialization for communications to the plurality of data storage devices and execute the operating system code and the object storage monitor code to provide object storage monitor functionality for the plurality of data storage devices.

Object storage monitoring

A data storage device includes a solid-state memory including memory cells and a controller configured to implement a data protection programming scheme by programming a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Protection against state transition errors in solid-state data storage systems

Systems and methods are disclosed for executing firmware in a computing device. A computing device comprises a controller comprising an interface and an interface state machine, non-volatile storage coupled to the interface state machine, the non-volatile storage storing initialization parameters, and a non-volatile memory module storing firmware for the device, the memory module coupled to the controller via the interface. The controller is configured to initialize the interface using the initialization parameters and the interface state machine, train the interface using the initialization parameters and the interface state machine, and execute the firmware from the non-volatile memory module.

Communication interface initialization

Systems and methods are disclosed for estimating charge loss in solid-state memory devices using electrical sensors. A data storage device includes a solid-state non-volatile memory comprising a plurality of memory cells, a sensor configured to hold an electric charge, and a controller. The controller is configured to charge the sensor to a first charge level at a first point in time, determine a second charge level of the sensor at a second point in time, after a time period from the first point in time, and refresh data stored in the memory cells based at least in part on the determined second charge level.

Data retention charge loss sensor

Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data retention or reduce read disturb of at least a portion of the solid-state non-volatile memory at least in part by receiving data to be written to the solid-state non-volatile memory. The controller is further configured to, when a data retention programming mode is set, encode the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a lower voltage level than the second programming state, and write the encoded data to the solid-state non-volatile memory. When a read disturb programming mode is set, the first programming state is associated with a higher voltage level than the second programming state.

Weighted programming patterns in solid-state data storage systems

Temperature management in data storage devices

A data storage device includes a solid-state memory including memory cells and a controller configured to perform a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Growing community of inventors

La Canada-Flintridge, CA, United States of America

Dale Charles Main