International Business Machines Corporation

Dale B Grosch

Toshiharu Saitoh

Douglas E Sprague

Michael L Combs

Donald L LaCroix

Randolph P Steel

Sally S Botala

Anthony K Stevens

Guy M Vanzo

A method of testing and repairing an integrated circuit having a total number of fuses for effecting repair of the integrated circuit. The method including: testing a memory array with a set of tests and reserving a first number of the total number of fuses for use in repairing the memory array based on results of the first set of tests; and shmoo testing the memory array by incrementing, decrementing or incrementing and decrementing values of a test parameter until a minimum or maximum value of the test parameter is reached that utilizes a second number of the total number of fuses for use in repairing the memory array to operate at the minimum or maximum value of the test parameter.

Testing and repair methodology for memories having redundancy

A method, system and software for automatically generating a test environment for testing a plurality of devices (DUTs) under test in a test system. The multiple devices are tested by mapping the plurality of DUTs into pins of the tester system to create pin data; inputting into a test program generator pattern data, generic test program rules and the pin data; generating a multi-DUT test program and multi-DUT pattern data; and controlling the test system through the test program. The resulting fail data is then logged to each DUT.

Automated multi-device test process and system

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Burlington, VT, United States of America

Dale B Grosch