Elpida Memory, Inc.

Longitude Licensing Limited

Kabushiki Kaisha Toshiba

Daisuke Tsuji

Osamu Shindo

Jun Sasaki

Akira Ide

Masahiro Yamaguchi

Masanori Yoshida

Kaoru Sonobe

Masahito Yamato

This semiconductor device is formed by stacking a plurality of semiconductor chips that each have a plurality of bump electrodes, each of the plurality of semiconductor chips being provided with an identification section formed on a respective side face. Each semiconductor chip has a similar arrangement for its respective plurality of bump electrodes, and each identification section is formed so that the positional relationship with a respective reference bump electrode provided at a specific location among the respective plurality of bump electrodes is the same in each semiconductor chip. The plurality of semiconductor chips are stacked such that the bump electrodes provided thereon are electrically connected in the order of stacking of the semiconductor chips, while the side faces on which the identification sections are formed are oriented in the same direction.

Semiconductor device

Semiconductor chip stack with identification section on chip side-surfaces for stacking alignment

A semiconductor device includes a chip stacked body where a plurality of semiconductor chips are stacked, and penetration electrodes respectively formed in the semiconductor chips are electrically interconnected in stacking order of the semiconductor chips, a first support member that is disposed to face a first semiconductor chip formed in one end of the chip stacked body, and including electrodes electrically connected to the penetration electrodes of the first semiconductor chip, and a wiring board that is disposed to face a second semiconductor chip formed in an end opposed to the one end of the chip stacked body, and including external electrodes on a surface opposed to a surface facing the second semiconductor chip that is to be electrically connected to the penetration electrodes of the second semiconductor chip.

Semiconductor device capable of suppressing generation of cracks in semiconductor chip during manufacturing process

A semiconductor device has at least a square wiring board having a board core made of an insulating material, wires made of a metal and formed on a first surface of the board core, a solder resist film formed on the first surface to cover the wires, and openings formed by partially opening the solder resist film, wherein a plurality of the elongated wires are arranged in parallel on the bottom of the openings, a semiconductor chip having electrodes flip chip connected to the wires are arranged on the bottom of the openings of the wiring board through a conductive bonding material, and an insulating resin is provided for filling an interstice between the wiring board and the semiconductor chip, wherein the wires extend along a width direction orthogonal to a longitudinal direction of the openings, the openings comprise elongated grooves which extend along at least two opposing sides of the square of the wiring board, a pair of opposing edges of the opening along the longitudinal direction define zig-zag edges in which the widths of the opening seem to be longer and shorter in a repeating sequence, and recessed edge portions which recess toward the outside of the opening formed by the zig-zag edges in the width direction correspond to the wires, and protruded edge portions which protrude toward the inside of the opening formed by the zig-zag edges in the width direction correspond to the board core between adjoining the wires.

Semiconductor device and method of manufacturing semiconductor device

Growing community of inventors

Tokyo, Japan

Daisuke Tsuji