Kabushiki Kaisha Toshiba

Toshiba Energy Systems & Solutions Corporation

Daisuke Hiratsuka

Tomohiro Iguchi

Masayuki Uchida

Yuuji Hisazato

Hitoshi Matsumura

Masako Fukumitsu

Atsushi Yamamoto

Kazuhito Higuchi

Nobuto Fujiwara

Akira Tojo

Naotake Watanabe

Hiroki Sekiya

Kazuya Kodani

Nobumitsu Tada

Akihiro Sasaki

Yo Sasaki

Hiroaki Ito

Kazuyasu Takimoto

Naotaka Iio

Toshiharu Ohbu

Yuta Ichikura

Naoki Yamanari

In a generation method according to one embodiment, a master curve of a relationship between an extent of reaction and a heat treatment condition is generated using a thermal analysis result of a member. Also, in the generation method, first data that is related to a first heat treatment condition of a relationship between time and temperature is generated using the first heat treatment condition and the master curve. Also, in the generation method, a second heat treatment condition of a relationship between time and temperature is calculated using the master curve and a target condition for heat treatment.

Generation method, generation device, generation system, program, and storage medium

According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.

Semiconductor device

A semiconductor module according to embodiments includes a first external terminal, a second external terminal, a first semiconductor switch which is electrically connected between the first external terminal and the second external terminal and includes a first gate electrode, a second semiconductor switch which is electrically connected in parallel with the first semiconductor switch, between the first external terminal and the second external terminal, and includes a second gate electrode, a first fuse electrically connected between the first external terminal and the first semiconductor switch, and a second fuse electrically connected between the second external terminal and the first semiconductor switch.

Semiconductor module

According to one embodiment, a metallic particle paste includes a polar solvent and particles dispersed in the polar solvent and containing a first metal. A second metal different from the first metal is dissolved in the polar solvent.

Metallic particle paste, cured product using same, and semiconductor device

According to one embodiment, a semiconductor module includes: a first circuit component: a second circuit component; and a third circuit component. The first circuit component includes: an insulating first substrate; a first conductive layer; a first switching element; and a first diode. The second circuit component includes: an insulating second substrate; a second conductive layer; a second switching element; and a second diode. The second circuit component is disposed between the first circuit component and the third circuit component. The third circuit component includes: an insulating third substrate; a third conductive layer provided on the third substrate and including a third element mounting unit; a third switching element provided on the third element mounting unit; and a third diode provided on the third element mounting unit. A direction from the third switching element toward the third diode is an opposite direction to the first direction.

Semiconductor module and method for manufacturing same

According to one embodiment, a semiconductor device includes, a chip including a first chip electrode on a first surface on one side, and a second chip electrode on a second surface on the other side, an electrically conductive frame provided on a side periphery of the chip, a rewiring configured to electrically connect the second chip electrode and the electrically conductive frame on the other side of the chip, and an insulation side portion provided between the electrically conductive frame and the side periphery of the chip.

Semiconductor device and method of manufacturing the same

According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.

Semiconductor device and manufacturing method of semiconductor device

Growing community of inventors

Yokohama, Japan

Daisuke Hiratsuka