Murata Manufacturing Co., Ltd.

Daiki Fukunaga

Hideaki Tanaka

Koji Moriyama

Masahiro Wakashima

Yuta Saito

Yuta Kurosu

Yu Tsutsui

Hironori Tsutsumi

Akihiro Tsuru

Daisuke Hamada

Kenichi Okajima

Satoshi Maeno

Ryota Aso

Takayuki Yao

Naoto Muranishi

Yasuharu Yamashita

Takehisa Sasabayashi

Akihiro Shiota

Nagato Omori

Hideyuki Hashimoto

Yasunari Nakamura

Masatsugu Kato

A multilayer ceramic capacitor includes a second alloy portion including one metal element provided in a greatest amount among metal elements of an internal electrode layer, and one or more metal elements among a metal group including Sn, In, Ga, Zn, Bi, Pb, Cu, Ag, Pd, Pt, Ph, Ir, Ru, Os, Fe, V, and Y is provided between a second dielectric ceramic layer and a first internal electrode layer, and between a second dielectric ceramic layer and a second internal electrode layer, respectively.

Multilayer ceramic capacitor

A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.

An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.

Electronic component

A method of manufacturing an electronic component includes preparing an unfired multilayer body including first and second main surfaces facing each other in a stacking direction, first and second side surfaces facing each other in a width direction, and first and second end surfaces facing each other in a length direction, bonding one main surface of the unfired multilayer body to an elongated first adhesive sheet, conveying the first adhesive sheet in a first direction in which the first adhesive sheet approaches an elongated second adhesive sheet, and bonding one side surface of the unfired multilayer body to the second adhesive sheet, conveying the second adhesive sheet in a second direction different from the first direction to peel off the unfired multilayer body from the first adhesive sheet, polishing another side surface of the unfired multilayer body, and forming a first insulating layer on the polished another side surface.

Method of manufacturing electronic component

A method of manufacturing a multilayer ceramic capacitor includes printing an internal electrode pattern on a dielectric layer, forming a dielectric pattern in a region other than a region in which the internal electrode pattern is printed, laminating dielectric layers to form a multilayer body, exposing the internal electrode pattern and the dielectric pattern from a side surface of the multilayer body, removing at least a portion of the exposed dielectric pattern, and forming a dielectric gap layer on the side surface.

Method of manufacturing multilayer ceramic capacitor

In a multilayer ceramic capacitor, an intersection of an interface is defined by a second dielectric ceramic layer, a first internal electrode layer or a second internal electrode layer, and a third dielectric ceramic layer, on a plane including a length direction and a width direction, the second dielectric ceramic layer and the third dielectric ceramic layer include a near intersection region at or near the intersection, and an average particle size of dielectric particles in the near intersection region is smaller than average particle sizes of dielectric particles in the first dielectric ceramic layer, the second dielectric ceramic layer, and the third dielectric ceramic layer.

In a multilayer ceramic capacitor includes, in a plane including a center portion in a length direction, and a stacking direction and a width direction of a first dielectric ceramic layer, where a thickness at a center portion in the stacking direction is T, a thickness at an end of the first dielectric ceramic layer in the width direction is T, and respective thicknesses between an end of a first internal electrode layer in the length direction not connected to a second external electrode, and the second external electrode, and between an end of the second internal electrode layer in the length direction not connected to the first external electrode, and the first external electrode is T, a difference in thickness between Tand Tis within about 10% of T, and a thickness of Tis greater than Tand Tand a difference thereof is about 10% or more of Tand T

In a multilayer ceramic capacitor, a first segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end in a length direction of a first internal electrode layer not connected to a second external electrode and an end in a length direction of a second internal electrode layer not connected to a first external electrode. A second segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end of the first internal electrode layer in a width direction and an end of the second internal electrode layer in the width direction.

A multilayer ceramic capacitor includes, in at least one of a region between an end of a first internal electrode layer which is not connected to a second external electrode and the second external electrode, and a region between an end of a second internal electrode layer which is not connected to a first external electrode and the first external electrode, in a length direction, a defect portion provided on a plane including a stacking direction and a width direction, such that the defect portion is located between the first dielectric ceramic layers in the stacking direction and is located between the second dielectric ceramic layer and the third dielectric ceramic layer in the width direction.

A multilayer ceramic capacitor includes a third segregation by each of metal elements of a first segregation and a second segregation is provided at each of a first corner region in which an end in a length direction in which the first segregation is provided overlaps an end in a width direction in which the second segregation is provided in a first internal electrode layer, and a second corner region in which an end in the length direction in which the second segregation is provided overlaps an end in the width direction in which the second segregation is provided in a second internal electrode layer.

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Nagaokakyo, Japan

Daiki Fukunaga