Hitachi, Ltd.

Renesas Technology Corp.

Asahi Kasei Microdevices Corporation

Daichi Matsumoto

Tsuyoshi Fujiwara

Satoshi Sakai

Kazutaka Mori

Masatoshi Hasegawa

Hidenori Sato

Kiyomi Katsuyama

Kiyohiko Sato

Ryohei Maeno

Akira Otaguro

Yukino Ishii

Kiyohiko Satoh

Tsutomu Miyazaki

Katsuyuki Asaka

A step of forming a stacked film serving as a lower electrode, a step of forming an insulating film serving as a capacitive film on the stacked film, and a step of patterning the insulating film and the stacked film are performed. In the step of forming the stacked film, a film containing titanium, a film containing titanium and nitrogen, a main conductive film containing aluminum, a film containing titanium, and a film containing titanium and nitrogen are sequentially formed from below. The ratio of the surface roughness of the upper surface of the stacked film to the thickness of the insulating film is 14% or less.

Manufacturing method of semiconductor device and semiconductor device

The orientation polarization (positive and negative) of the Si&#x2014;N bonds and the Si&#x2014;O bonds is canceled, thereby enabling to minimize the polarization in a capacitive insulating film. As a result, a silicon oxynitride film with a small voltage secondary coefficient is formed, and is applied as a capacitive insulating film for use in a MIM capacitor. Specifically, the refractive index 'n' of the silicon oxynitride film satisfies 1.47&#x2266;n&#x2266;1.53, for light with a wavelength of 633 nm.

Transistor with MIM (Metal-Insulator-Metal) capacitor

Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700&#xb0; C. or higher.

Method of manufacturing semiconductor integrated circuit device, and semiconductor integrated circuit device made by its method

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Hamura, Japan

Daichi Matsumoto