Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Entegris, Inc.

Myongji University Industry and Academia Cooperation Foundation

Pce Tech Co., Ltd.

Dahye Kim

Jinbum Kim

Jaemun Kim

Kyungin Choi

Gyeom Kim

Sangmoon Lee

Ilgyou Shin

Seung Hun Lee

Seunghun Lee

Sujin Jung

Jungho Park

Dongchan Suh

Kyungbin Chun

Ingyu Jang

Dongwoo Kim

Kihyun Hwang

Keun Hwi Cho

Seokhoon Kim

Haejun Yu

Jinwoo Park

Bryan Clark Hendrix

Seokhyun Lee

Dongsuk Shin

Kangmoon Jo

Heeseong Jeong

Yunmo Chung

Dohee Kim

Sunhwa Kim

Kwanghyun Kim

Jungbae Song

Younho Han

Byoungki Kim

Minjun Bae

Hyun-gue Song

Sungsil Cho

Heekwang Song

Soojin Lee

Woochan Kim

Philip S H Chen

Sookkyung Lee

Jae Sul An

Kun Na

Junhwa Oh

Seunghwan Hong

Juyoun Son

Dongmyoung Kim

Min-Gwan Hyun

Jae Eon Park

Mansoo Kim

Jeongweon Seo

Shawn D Nguyen

Yongjun Nam

Sangho Koo

Hyunbin Lee

Youngkwang Kim

Hyun-Hyang Kim

HwanSoo Kim

Mohammad Shariful Alam

Dale Ahn

Jeongdeok Seo

Minji Ahn

Hyun-Gue Song

An integrated circuit (IC) device includes a fin-type active region on a substrate, a pair of nanosheets on the fin-type active region, a gate line surrounding the pair of nanosheets, the gate line including a sub-gate portion between the pair of nanosheets, a source/drain region contacting the pair of nanosheets, and a gate dielectric film between the gate line and the pair of nanosheets and between the gate line and the source/drain region, wherein the source/drain region includes a first blocking layer between the pair of nanosheets, the first blocking layer including an edge barrier enhancing portion facing the sub-gate portion, and a second blocking layer, wherein the first blocking layer includes a portion that intermittently extends in the vertical direction.

Integrated circuit device

An integrated circuit (IC) device includes a fin-type active region, a channel region on the fin-type active region, a gate line surrounding the channel region, an outer insulating spacer covering a sidewall of the gate line, a source/drain region on the fin-type active region, wherein the source/drain region includes a buffer layer including a portion in contact with the channel region and a portion in contact with the fin-type active region, the buffer layer including an edge buffer portion having a smaller thickness than other portions thereof at a position adjacent to the outer insulating spacer, a local buffer pattern including a wedge portion, the wedge portion filling a space defined by the edge buffer portion and the outer insulating spacer, and a main body layer in contact with each of the buffer layer and the local buffer pattern.

A semiconductor device includes a fin-type active region that protrudes from a substrate and extends in a first direction, a plurality of channel layers on the fin-type active region that are spaced apart from each other in a second direction that is perpendicular to an upper surface of the substrate, a gate structure that intersects the fin-type active region, extends in the second direction, and surrounds each of the plurality of channel layers in a third direction, fence spacers on side surfaces of the fin-type active region in the second direction on sides of the gate structure and extending in the second direction, and a source/drain region between the fence spacers on the fin-type active region at sides of the gate structure, connected to each of the plurality of channel layers, and having voids in side surfaces adjacent the fence spacers.

Semiconductor device

A semiconductor device is provided. The semiconductor device includes: a substrate including an active region; a gate structure intersecting the active region on the substrate; channel layers on the active region, spaced apart from each other and surrounded by the gate structure; and a source/drain region on the active region adjacent the gate structure and connected to the plurality of channel layers. The source/drain region includes: a first semiconductor layer on side surfaces of the channel layers; a diffusion barrier layer on an upper region of the first semiconductor layer and including carbon, wherein an upper surface of a first channel layer that is a lowermost channel layer among the plurality of channel layers is provided between the substrate and a lower end of the diffusion barrier layer; and a second semiconductor layer on the diffusion barrier layer and the first semiconductor layer.

Semiconductor devices

The present invention relates to pH-sensitive carbon nanoparticles, a method of preparing the same, and a drug delivery using the same, and pH-sensitive carbon nanoparticles including imidazole is prepared so that a hydrophobic drug and a photosensitizer material can be encapsulated, drug release is possible under weakly acidic conditions, and thus it can be used as a drug carrier for anticancer treatment, photodynamic therapy, or photomediated anticancer immunotherapy.

pH-sensitive carbon nanoparticles, preparation method therefor, and drug delivery using same

A semiconductor device includes an active region, a plurality of channel layers disposed to be spaced apart from each other in a vertical direction on the active region, a gate structure extending in a second direction to intersect the active region and the plurality of channel layers and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and contacting the plurality of channel layers, and a contact plug connected to the source/drain region. The source/drain region includes a first epitaxial layer disposed on the active region and extending to contact the plurality of channel layers, second epitaxial layers disposed on the first epitaxial layer, each including impurities in a first concentration, and doping layers stacked alternately with the second epitaxial layers, each including the impurities in a second concentration higher than the first concentration.

Provided are certain silicon precursor compounds which are useful in the formation of silicon-containing films in the manufacture of semiconductor devices, and more specifically to compositions and methods for forming such silicon-containing films, such as films comprising silicon dioxide.

Silicon precursor compounds and method for forming silicon-containing films

An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.

Integrated circuit devices and methods of manufacturing the same

A semiconductor device includes a substrate including a peripheral region, a first active pattern on the peripheral region, the first active pattern having an upper portion including first semiconductor patterns and second semiconductor patterns, which are alternately stacked, a first gate electrode intersecting the first active pattern, a pair of first source/drain patterns provided at both sides of the first gate electrode, respectively, a first capping layer on the first active pattern, a second capping layer on the first capping layer, and a first gate insulating layer between the second capping layer and the first gate electrode. The first capping layer is between a sidewall of the first active pattern and the second capping layer. A concentration of germanium (Ge) of the first capping layer is greater than a concentration of germanium of the second capping layer.

Semiconductor device having capping layers with different germanium concentrations over an active pattern

A semiconductor device includes a substrate having an active region extending in a first direction; a gate structure disposed on the substrate, intersecting the active region, and extending in a second direction; channel layers disposed on the active region to be spaced apart from each other in a third direction, perpendicular to an upper surface of the substrate, and to be surrounded by the gate structure; source/drain regions disposed on both sides of the gate structure and connected to the channel layers; air gap regions located between the source/drain regions and the active region and spaced apart from each other in the third direction; and semiconductor layers alternately disposed with the air gap regions in the third direction and defining the air gap regions, wherein lower ends of the source/drain regions are located on a level lower than an uppermost air gap region.

Semiconductor device including air gap regions below source/drain regions

Provided are certain silicon precursor compounds which are useful in the formation of silicon-containing films in the manufacture of semiconductor devices, and more specifically to compositions and methods for forming such silicon-containing films, such as films comprising silicon dioxide or silicon nitride.

A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.

Semiconductor device having a liner layer and method of fabricating the same

A tiled display device includes a plurality of display panel modules arranged adjacent to each other. Each of the plurality of display panel modules includes a display panel including a display area and a bezel area at least partially surrounding the display area, a light blocking layer disposed on the display panel and extending from the display area to a portion of the bezel area, and a protective layer disposed on the light blocking layer. In the bezel area, a distance from an end of the display panel to an end of the protective layer is greater than a distance from the end of the display panel to an end of the light blocking layer. Accordingly, an air layer is not formed between the protective layer and the display panel. A visibility of a seam area is reduced.

Tiled display device

Disclosed are a semiconductor device and a method of fabricating the same, the semiconductor device including an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern on the active pattern, connected to the source/drain pattern, and including stacked semiconductor patterns, a gate electrode extending in a first direction and crossing the channel pattern, and a gate insulating layer between the gate electrode and the channel pattern. The source/drain pattern includes first and second semiconductor layers, the first semiconductor layer including a center portion including a second outer side surface in contact with the gate insulating layer and an edge portion adjacent to a side of the center portion and including a first outer side surface in contact with the gate insulating layer. The second outer side surface is further recessed toward the second semiconductor layer, compared with the first outer side surface.

Multi-oxide-semiconductor field-effect transistor with stacked source/drain structure

A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.

Semiconductor devices and method of fabricating the same

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Yongin-si, South Korea

Dahye Kim