Cadence Design Systems, Inc.

Dahe Chen

Shuo Zhang

Jing Yang Chen

Vassilios Constantinos Gerousis

Jianmin Li

Taufik Arifin

Yuan Huang

Soohong A Kim

Guowei Zhao

Various embodiments identify some constraints for multiple mask designs of multi-patterning lithography processes for manufacturing an electronic design and colors multiple routing tracks in a layer of the electronic design with certain colors. These embodiments color fixed object(s) in the design with one or more of these certain colors based on coloring of the multiple routing tracks. Some embodiments further color movable object(s) based on results of coloring the fixed object(s) or coloring routing track(s). Some embodiments route the physical design with coloring of fixed object(s), coloring of movable object(s), or routing connectivity. Multiple-patterning conflicts may be detected based on the coloring of fixed object(s), coloring of movable object(s), or routing connectivity. Some embodiments route with search-and-repair strategy(ies) to improve or resolve conflict(s). Some embodiments color objects upon their creation, and the layout is thus multiple-patterning design rule clean as constructed.

Methods, systems, and articles of manufacture for implementing a physical electronic circuit design with multiple-patterning techniques

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Metuchen, NJ, United States of America

Dahe Chen