Lg Display Co., Ltd.

DaeSeok Oh

Yonghwa Park

Moonsoo Chung

Seunghwan Shin

Taehun Kim

Jin Hee Jeon

Byeongseong So

Sunghun Kim

Youngsung Cho

Joohee Lee

Bogun Seo

Saichang Yun

Daeho Park

MinHwa Kim

Jae-Kwang Kim

Jinwoo Jung

Jiyoung Jung

Sangsoon Yoon

Disclosed are a display panel having a large area, high resolution, a narrow bezel, low power consumption, and having reduced Resistance Capacitance (RC) delay, and a display device including the same. The display panel includes an Active Area Gate-In-Panel (AAGIP) disposed between adjacent pixel blocks, wherein the AAGIP unit is configured to: connect an n scan line disposed in and along sub-pixels of an n-th row of the pixel block on one side of the AAGIP unit and an n scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on the other side thereof to each other; and connect an n+1 scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on one side thereof and an n+1 scan line disposed in and along sub-pixels of an n-th row of the pixel block on the other side thereof to each other. Thus, defect such as crosstalk or smear caused by data line transition is reduced.

Display panel having each active area gate-in-panel (AAGIP) unit disposed between adjacent ones of the plurality of pixel blocks and display device including the same

A display device and a driving method thereof may be capable of compensating for noise caused by image data with inverted image data to cancel a noise component. The device includes a display panel divided into a first area and a second area; a first source driving circuit and a second source driving circuit for providing a source signal to the first area and the second area, respectively; a gate driving circuit for providing a scan signal; a touch driving circuit for applying a touch driving signal and sensing a touch signal; and a timing controller. The timing controller controls corresponding circuits to display first image data on the first area during a first display time, and to provide a source signal corresponding to first inverted data obtained by inverting the first image data to the second area during the first display time.

Display device and method for driving the same

According to an aspect of the present disclosure, a foldable display device includes a display panel including a plurality of display areas divided by a folding line; and a data integrated circuit outputting a data voltage to the plurality of display areas, wherein the data integrated circuit includes a timing controller outputting a gamma enable signal; a data processor processing an image data; a gamma voltage generator determining whether or not to output a plurality of gamma voltages according to the gamma enable signal; and a digital analog converter (DAC) outputting the gamma voltage, as the data voltage corresponding to a gray value of the image data.

Foldable display device

A display device includes an image signal processor generating modulation data of each pixel region corresponding to a display period of each frame based on an image signal and predetermined modulation value tables which are preset to different gains. The image signal processor includes a block divider and at least two data modulators. The block divider divides the display region into at least two block regions along a second direction. The at least two data modulators correspond to the at least two block regions, modulate gray scale data of each of pixel regions included in each block region based on a modulation value table, and generate modulation data of the pixel regions included in each block region. As a result, a difference in the charge amount caused by line resistance can be compensated according to the overdriving scheme, resulting in prevention of image quality deterioration.

Display device

A dimming control method of a backlight unit of a liquid crystal display (LCD) device driven at a driving frequency (f) of 60 Hz or lower includes a first step of driving the backlight unit using a first dimming value, and a second step of driving the backlight unit using a second dimming value higher than the first dimming value. The first step and the second step are alternately repeated and a repetition number of the second step within one period T of a driving frequency (f) is set to satisfy a condition of '{(60/f)&#x2212;1}'. Here, f is a natural number lower than 60.

Liquid crystal display and dimming control method thereof

A liquid crystal display is provided comprising an LCD panel including data lines formed along a column direction, gate lines formed along a row direction perpendicular to the column direction, and a plurality of pixels arranged in a matrix pattern at intersections of the data lines and the gate lines, a data driver that supplies data voltages to the data lines, and a gate driver that sequentially supplies gate pulses to the gate lines. Subpixels of each of the pixels share one data line through which a data voltage is sequentially charged to the subpixels in a time-division manner. A column-directional length of each of the subpixels is longer than a row-directional length of each of the subpixels.

Liquid crystal display for operating pixels in a time-division manner

A display device and method of driving the same are disclosed. The display device that transmits signals between a system board section and a circuit board section through an interface and uses Panel Self-Refresh (hereinafter, abbreviated as 'PSR') to reduce power consumption, the circuit board section comprising a PSR controller that, when a PSR On signal is supplied from the system board section, changes the operating frequency of a gate driver and data driver to a frequency higher than a reference frequency for driving the panel with PSR On, set by the system board section.

Display device and method of driving the same

A display device capable of driving at low speed is disclosed. Pixels connected to a first data line on odd-numbered display lines of a display panel are positioned on one side of the left and right sides of the first data line, and pixels connected to the first data line on even-numbered display lines of the display panel are positioned on the other side of the first data line based on a Z-inversion scheme. When a mode conversion control signal for switching to an interlaced low speed driving mode is input during a normal drive, in which a length of one frame is set to P, a timing controller expands a length of one frame for a low speed drive to (n&#xd7;P), where n is a positive integer equal to or greater than 2 and assigns a length P to each of n sub-frames of the one frame.

Display device capable of driving at low speed

Disclosed is an LCD device. The LCD device includes a panel in which a plurality of gate lines cross a plurality of data lines, a source driving IC configured to alternately output a current data voltage and a current common voltage, a common electrode connected to the source driving IC through at least two or more common voltage lines, and a timing controller configured to generate current image data used to generate the current data voltage and common voltage data used to generate the current common voltage to be outputted to the source driving IC in correspondence with the current data voltage.

Liquid crystal display device and driving method thereof

A display device capable of driving at low speed includes a display panel, on which display lines each including a plurality of pixels are formed, a driver unit for driving the pixels, and a timing controller which controls an operation of the driver unit and includes a first control logic unit and a second control logic unit. When a mode conversion control signal of an on-level is input during a normal drive, in which a length of one frame is set to P, the first control logic unit expands a length of one frame for a low speed drive to (n&#xd7;P), where n is a positive integer equal to or greater than 2, assigns a length P to each of n sub-frames included in the one frame for the low speed drive, and controls the operation of the driver unit in an interlaced low speed driving scheme.

A display device includes a display panel including data lines, a source driver positioned at one side of the display panel, and a timing controller which sequentially stores digital video data in a plurality of line memories, starts to generate an output data enable signal in conformity with a first writing start timing of a last line memory of the line memories, adjusts a pulse width of the output data enable signal of each horizontal pixel line based on a previously determined charge time graph, reads out the digital video data from the line memories in synchronization with rising edges of the output data enable signal, and generates a source output enable signal having the same pulse width each time each line memory finishes reading out the data.

Growing community of inventors

Paju-si, South Korea

DaeSeok Oh