Samsung Electronics Co., Ltd.

Daehee Lee

Hyunchul Jung

Taeho Ko

Moonhui Lee

Seungil Chai

Kyunghee Shin

A semiconductor device, includes a plurality of semiconductor elements, each of the plurality of semiconductor elements including a gate structure extending in a first direction and an active region provided on both sides of the gate structure in a second direction intersecting the first direction; and a plurality of interconnection patterns connected to the plurality of semiconductor elements, wherein the plurality of interconnection patterns include a plurality of upper interconnections provided above the plurality of semiconductor elements in a third direction, a plurality of intermediate interconnections provided between the plurality of semiconductor elements and the plurality of upper interconnections in the third direction, and a routing interconnection adjacent to at least one of the plurality of semiconductor elements in the second direction, wherein the routing interconnection is connected to at least one of the plurality of intermediate interconnections in the first direction or the second direction.

Semiconductor device and layout method of the same

A semiconductor device may include a semiconductor chip in an encapsulant. A first insulation layer may be disposed on the encapsulant and the semiconductor chip. A horizontal wiring and a primary pad may be disposed on the first insulation layer. A secondary pad may be disposed on the primary pad. A second insulation layer covering the horizontal wiring may be disposed on the first insulation layer. A solder ball may be disposed on the primary pad and the secondary pad. The primary pad may have substantially the same thickness as a thickness of the horizontal wiring.

Growing community of inventors

Cheonan-si, South Korea

Daehee Lee