Samsung Electronics Co., Ltd.

Dae-Yong Kang

Joonsoo Park

SoonMok Ha

Byungjun Jeon

Jaehee Kim

Eun-sung Kim

Eunsung Kim

Shi-yong Yi

Seung-chul Kwon

Sung-wook Hwang

Methods of fabricating a semiconductor device are provided. The methods may include forming a stopper layer on a target layer including a cell area and an edge area, forming a hard mask including first upper openings and dam trench on the stopper layer, forming opening spacers on inner walls of the first upper openings and a dam pattern in the dam trench, removing the stopper layer exposed in the first upper openings to form first lower openings, forming pillar patterns in the first lower openings and the first upper openings and an eaves pattern on the dam pattern, removing the hard mask in the cell area, forming a first polymer block between the pillar patterns including second upper openings, etching the stopper layer exposed in the second upper openings to form second lower openings, and removing the first polymer block, the pillar patterns, the dam pattern and the eaves pattern.

Methods of forming semiconductor devices including contact holes

A method for forming fine patterns includes patterning a hard mask layer on an etch target layer to form sacrificial pillars and a first opening disposed between the sacrificial pillars and exposing the etch target layer, forming a block copolymer layer on the etch target layer exposed through the first opening, phase-separating the block copolymer layer to form first block patterns spaced apart from the sacrificial pillars and a second block pattern, forming first holes by etching the etch target layer exposed by removing the first block patterns, and forming second holes in the etch target layer exposed by removing the sacrificial pillars, the second holes being different from the first holes.

Method for forming fine patterns of semiconductor device

The present inventive concept provides a method of forming a fine pattern including forming a plurality of pillar-shaped guides that are regularly arranged on a feature layer.

Methods of forming fine patterns and methods of manufacturing integrated circuit devices using the methods

The inventive concept provides methods for forming fine patterns of a semiconductor device. The method includes forming a buffer mask layer having first holes on a hard mask layer including a first region and a second region around the first region, forming first pillars filling the first holes and disposed on the buffer mask layer in the first region and second pillars disposed on the buffer mask layer in the second region, forming a block copolymer layer covering the first and second pillars on the buffer mask layer, phase-separating the block copolymer layer to form first block patterns spaced apart from the first and second pillars and a second block pattern surrounding the first and second pillars and the first block patterns, removing the first block patterns, and forming second holes in the buffer mask layer under the first block patterns.

Growing community of inventors

Suwon-si, South Korea

Dae-Yong Kang