Samsung Electronics Co., Ltd.

Dae Yeal Lee

Dongku Kang

Jaewoo Im

Jae-Hak Yun

Kangguk Lee

A method of operating a nonvolatile memory device is provided. The nonvolatile memory device includes a memory cell array including a plurality of memory cells. The method includes: the nonvolatile memory device determining an operation mode based on the received command, the nonvolatile memory device generating a comparison voltage based on the determined operation mode, the nonvolatile memory device comparing the comparison voltage with a reference voltage to generate a result, and the nonvolatile memory device performing a recovery operation on at least one of the memory cells depending on the result.

Nonvolatile memory device having a recovery operation conditioned on an operation mode, operation method thereof, and storage device including the same

A nonvolatile memory device is provided which includes a page buffer unit. The page buffer unit includes a first page buffer including a first A latch configured to store first upper bit data and a first B latch configured to store first lower bit data, and a second page buffer including a second A latch configured to store second upper bit data and a second B latch configured to store second lower bit data. A set pulse may be applied to both the first A latch and the second B latch, or to both the second A latch and the first B latch. The non-volatile memory device may provide high write performance and may respond within a time out period of a handheld terminal.

Nonvolatile memory device comprising page buffer and program verification operation method thereof

A nonvolatile memory device is provided which includes a cell array including a plurality of memory cells; a page buffer unit including a plurality of page buffers and configured to sense whether programming of selected memory cells is completed, at a program verification operation; and a control logic configured to provide a set pulse for setting data latches of each of the page buffers to a program inhibit state according to the sensing result, wherein the control logic provides the set pulse to at least two different page buffers such that data latches of the at least two different page buffers are set.

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Hwaseong-si, South Korea

Dae Yeal Lee