Lsis Co., Ltd.

Samsung Electronics Co., Ltd.

Ls Industrial Systems Co., Ltd.

Yonsei University

Dae Hyun Kwon

Soo Gang Lee

Joon Seok Oh

Sung Han Lee

Sang Won Son

Thomas Byunghak Cho

Siddharth Seth

Sriramkumar Venugopalan

Woo Young Choi

Qing Liu

Wang Soo Kim

Hui Changhsiang

Sung Sik Ham

Dong Kyu Park

Min-Hyeong Kim

A memory device including a receiving circuit is provided. The receiving circuit of the memory device includes a first path receiving a received signal and outputting the received signal directly as a first corrected signal in a current clock signal, a second path holding or tracking the received signal and outputting a second corrected signal in the current clock signal, wherein the second corrected signal is held in a previous clock signal, a summing circuit summing the first corrected signal and the second corrected signal and outputting a summed received signal, and a decision feedback equalizer comparing the summed received signal with a reference signal to decide equalized data and outputting the equalized data in the current clock signal.

Memory device including receiving circuit, electronic device, and received signal processing method of electronic device

Disclosed are a data transmission device for modulating the amplitude of a PAM-4 signal using a toggle serializer and a method of operating the same. In accordance with an embodiment of the present disclosure, the data transmission device includes a toggle serializer configured to generate at least one toggle signal by detecting logic level change of first and second signals from a Pulse Amplitude Modulation (PAM) signal including the first and second signals; and a driver configured to modulate an amplitude of the PAM signal by combining the first signal, the second signal, and the at least one toggle signal.

Data transmission device for modulating amplitude of PAM-4 signal using toggle serializer and method of operating the same

A first communication device calculates a plurality of data error codes for detecting an error in a plurality of data fields by using the plurality of data fields. The first communication device generates a packet comprising the plurality of data fields and the plurality of data error codes, and then transmits the packet which is generated to a second communication device.

Communication device and communication method

A method for a first communication device transmitting data to a second communication device, according to one embodiment of the present invention, comprises the steps of: the first communication device generating a safety unique identifier by using a unique identifier of the first communication device and a unique identifier of the second communication device, in order to confirm the validity of connection between the first communication device and the second communication device; the first communication device calculating a data error detection code for detecting an error by using the safety unique identifier and the data; the first communication device generating a packet comprising the data and the data error detection code; and the first communication device transmitting the packet to the second communication device.

A first communication device calculates a data error detection code for detecting an error in data by using the data and a virtual sequence number, and generates a packet comprising the data and the data error detection code. The packet does not include the virtual sequence number which is used for calculating error detection. The first communication device transmits the packet to a second communication device.

An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.

Apparatus and method for dynamically biased baseband current amplifier

Provided are a semiconductor device and an operating method thereof. A semiconductor device includes a mixer configured to upconvert a baseband signal using a local oscillator (LO) signal; and a notch filter configured to receive the upconverted signal from the mixer and filter notch frequency components, the notch filter further configured to resonate at a fundamental frequency to provide a higher impedance and resonate at a notch frequency different from the fundamental frequency to provide a lower impedance.

Semiconductor device and operating method thereof

Disclosed is a PLC system having a plurality of CPU modules and a control method thereof, wherein the method includes ascertaining a clock signal when a count is a count corresponding to a time slot allocated by a master CPU module, generating a clock signal by accessing to a backplane, and ending generation of clock signal at a time when the access to the backplane ends.

PLC system having a plurality of CPU modules and control method thereof

An access controlling method of a dual port memory system is provided. The method includes: requesting, by a first processor, an access from a dual port memory; and transmitting, by the dual port memory, a result signal according to the access request to the first processor, wherein the result signal includes a first result signal for notifying access success, a second result signal for notifying access failure, and a third result signal for notifying access hold.

Access controlling method of dual port memory system

A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.

Provided is a dual port Ethernet communication device which allows data received via any one communication port to be bypassed to other communication port. Since the Ethernet communication device performs such bypass operation itself, the communication data can be kept transferred to other terminal unit even though the terminal unit equipped with the Ethernet communication device does not operate normally due to causes such as a break down. In particular, if it is used in each terminal unit forming a closed loop in a closed loop power system, the communication on the closed loop remains such that the adjacent terminal unit can perform backup interrupt function even though a failure happens in a specific terminal unit forming the closed loop.

Dual port ethernet communication device with bypass function

Disclosed is a switching device of a dual-port Ethernet system capable of solving a conflict caused by the dual-port in an Ethernet system having the dual-port. According to the present disclosure, there is little transmission delay when the data frame is relayed between ports in the dual-port Ethernet system. Further, when a frame relay transmission is simultaneously generated with a frame transmission of an upper layer device, it is possible to prevent a conflict by determining a priority.

Switching device of dual-port ethernet system

A data relay apparatus for communication module is disclosed, whereby a plurality of normally operative communication modules can perform data communication thereamong by allowing a data relay unit to relay data received by an input/output (I/O) port of an inoperative communication module in a case there is available an inoperative communication module among the plurality of communication modules, in a network configured by connecting the plurality of communication modules having two I/O Ethernet communication ports connected via a line topology.

Growing community of inventors

Anyang-si, South Korea

Dae Hyun Kwon