Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Solum Co., Ltd.

Dae Hyun Jang

Yoo Sam Na

Yoo Hwan Kim

Hyun Hwan Yoo

Hyun Jin Yoo

Jong Myeong Kim

Hyuk Kim

Chang Min Seo

Seung Pil Chung

Ha Na Kim

Yong Hyun Kwon

Sung Il Cho

Seung Jae Jung

Sung Soo Ahn

Ki Jeong Kim

Jong Sik Park

Yong Jae Kim

Sang Joon Yoon

Jung Ik Oh

Sung Ii Cho

A PCB assembly includes a second PCB disposed adjacent to a first PCB and have a second hole facing a first hole, an upper plate disposed at an upper of the first and second hole and have a third hole disposed at the upper of the first hole and a fourth hole disposed at the upper of the second hole, a holder disposed at a lower of the first and second hole and have a lower plate having a fifth hole disposed at the lower of the first hole and a sixth hole disposed at the lower of the second hole, a first fixing screw penetrating through the third first, and fifth hole, and a second fixing screw penetrating through the fourth, second and sixth hole, and the lower plate includes a protrusion penetrating through the second PCB coupling the first PCB and the second PCB.

Printed circuit board assembly

A vertical memory device and a method of manufacturing such device are provided. The vertical memory device may include a plurality of gate electrode layers stacked in a cell region of a semiconductor substrate; a plurality of upper isolation insulating layers dividing an uppermost gate electrode layer among the plurality of gate electrode layers, extending in a first direction; a plurality of vertical holes arranged to have any two adjacent vertical holes to have a uniform distance from each other throughout the cell region and including a plurality of channel holes penetrating through the plurality of gate electrode layers disposed between the plurality of upper isolation insulating layers and a plurality of first support holes penetrating through the plurality of upper insulating layers; a plurality of channel structures disposed in the plurality of channel holes; and a plurality of first support structures disposed in the plurality of first support holes.

Vertical memory device

A female connector capable of easily confirming whether or not a male connector is connected thereto, a connector module having the male connector, and an electronic device having the connector module are disclosed. The female connector comprises a connector body, a first terminal engagement pin and a second terminal engagement pin. The first terminal engagement pin is disposed inside the connector body and capable of receiving an input signal from a connection terminal of a male connector when the connection terminal is in contact therewith. The second terminal engaging pin is disposed inside the connector body to be spaced apart from the first terminal engaging pin. The first and second terminal engagement pins are electrically connected with each other through the connection terminal when the connection terminal is inserted and coupled between the first and second terminal engagement pins.

Female connector, connector module having the female connector and electronic device having the connector module

A method of manufacturing a semiconductor device includes alternately stacking mold insulating layers and sacrificial layers on a substrate; forming channel holes penetrating through the mold insulating layers and the sacrificial layers and allowing recessed regions to be formed in the substrate; cleaning a surface of the recessed regions in such a manner that processes of forming a first protective layer in an upper region of the channel holes and performing an anisotropic dry etching process on the recessed regions in a lower portion of the channel holes are alternately repeated one or more times, in-situ; and forming epitaxial layers on the recessed regions of the substrate.

Method of manufacturing semiconductor devices

A radio frequency switch circuit may include: a first switch circuit unit connected between a first signal port for transmitting and receiving a signal and a common connection node and operated by a first gate signal; a second switch circuit unit connected between a second signal port for transmitting and receiving a signal and the common connection node and operated by a second gate signal; a first shunt circuit unit including first and second shunt units connected to each other in series between a first connection node connected to the first signal port and a ground, the first shunt unit being operated by the first gate signal and the second shunt unit being operated by the second gate signal; and a second shunt circuit unit connected between a second connection node connected to the second signal port and the ground and operated by the first gate signal.

Radio frequency switch circuit

A low-drop-output type voltage regulator may include an error amplifier providing a gate signal depending on a voltage difference between a reference voltage and a feedback voltage, a semiconductor switch adjusting a current between an input terminal receiving a battery voltage and a ground, in response to the gate signal, a feedback circuit dividing and detecting a detection voltage in a detection node between the semiconductor switch and the ground and providing the feedback voltage, a voltage sensor sensing the battery voltage, and a feedback voltage controller adjusting a level of the feedback voltage depending on the sensed battery voltage.

Low-drop-output type voltage regulator and RF switching control device having the same

According to example embodiments, a memory device includes a substrate, a channel region on the substrate, a plurality of gate electrode layers stacked on each other on the substrate, and a plurality of contact plugs. The gate electrode layers are adjacent to the channel region and extend in one direction to define a pad region. The gate electrode layers include first and second gate electrode layers. The contact plugs are connected to the gate electrode layers in the pad region. At least one of the contact plugs is electrically insulated from the from the first gate electrode layer and electrically connected to the second gate electrode layer by penetrating through the first gate electrode layer.

Memory device

Growing community of inventors

Suwon-si, South Korea

Dae Hyun Jang