Samsung Electronics Co., Ltd.

Dae-Hyuk Chung

In-seak Hwang

In-Seak Hwang

Yong-Sun Ko

Yoon-Ho Son

In-Gi Kim

Kyoung-hwan Kim

Kyung-Hyun Kim

Suk-Hun Choi

Byoung-Moon Yoon

Kwang-Wook Lee

Sang-jun Lee

Han-Joo Lee

Se-Ho Cha

In-joon Yeo

Tae-ho Hwang

Dae-Keun Kang

Chang-lyong Song

Myang-Sik Han

Choong-Kee Seong

Tae-Joon Park

Mong-Sup Lee

Sang-Hyun Choi

Jin-Ho Noh

A method of fabricating a semiconductor device includes forming a first preliminary gate barrier layer and a first preliminary gate electrode recessed to have a first depth from the surface of the substrate within a gate trench, removing an upper portion of the first preliminary gate electrode by means of a first wet etching process using a first etchant to form a second preliminary gate electrode recessed to have a second depth greater than the first depth, and removing an upper portion of the first preliminary gate barrier layer and an upper portion of the second preliminary gate electrode by means of a second wet etching process using a second etchant to form a gate electrode and a gate barrier layer recessed to a third depth greater than the second depth.

Method of fabricating semiconductor device

In a semiconductor device having an enlarged contact area between a contact structure and a substrate, the substrate may include a first region on which a conductive structure is arranged and a second region defining the first region. The first region may include a multi-faced polyhedral recess of which at least one of the sidewalls is slanted with respect to a surface of the substrate. An insulation layer may be formed on the substrate to a thickness that is sufficient to cover the conductive structure. The insulation layer has a contact hole that may be communicated with the recess. The active region of the substrate is exposed through the contact hole. A conductive pattern is positioned in the recess and the contact hole. Accordingly, the contact resistance at the active region of the substrate may be kept to a relatively low value even though the gap distances and line width of pattern lines are reduced.

Memory device

In an apparatus and method for removing a photoresist structure from a substrate, a chamber for receiving the substrate includes a showerhead for uniformly distributing a mixture of water vapor and ozone gas onto the substrate. The showerhead includes a first space having walls and configured to receive the water vapor, and a second space connected to the first space so that the water vapor is supplied to and partially condensed into liquid water on one or more walls of the first space. Ozone gas and water vapor without liquid water may be supplied to the second space to form the mixture therein. The showerhead may be heated to vaporize the liquid water on a given surface of the first space.

Apparatus and method for removing a photoresist structure from a substrate

A slurry composition for a chemical mechanical polishing process and a method of manufacturing a semiconductor memory device using the slurry composition are provided. The slurry composition may include about 0.001 percent by weight to about 5 percent by weight of a ceria abrasive, about 0.001 percent by weight to about 0.1 percent by weight of a nonionic surfactant adsorbed onto a polysilicon layer forming a passivation layer on the polysilicon layer, the nonionic surfactant having a chemical structure of a triblock copolymer including a first polyethylene oxide block, a polypropylene oxide block and a second polyethylene oxide block and a remainder of water.

Slurry composition for a chemical mechanical polishing process and method of manufacturing a semiconductor device using the slurry composition

A wiring structure of a semiconductor device may have an insulation layer, a spacer and a plug. The insulation layer may be provided on a substrate and may have an opening through which a contact region of the substrate is exposed. The spacer may be provided on a sidewall of the opening. The plug may fill the opening and may include a polysilicon pattern doped with impurities, a metal silicide pattern, and a metal pattern sequentially provided on the substrate.

Wiring structure of a semiconductor device and method of forming the same

Example embodiments of the present invention relate to methods of treating and removing a photoresist pattern and a method of manufacturing a semiconductor device using the same. Other example embodiments of the present invention relate to a method of treating a photoresist pattern and a method of removing a photoresist pattern formed using a photoresist composition suitable for argon fluoride (ArF). In a method of removing a photoresist pattern, an ozone vapor including a water vapor and an ozone gas may be provided onto the photoresist pattern to remove a hydrophobic group from a photoresist resin included in the photoresist pattern. A cleaning solution may be provided to make the photoresist pattern water-soluble. A cleaning process may be performed on the photoresist pattern to remove the photoresist pattern. The photoresist pattern may be effectively removed without an increased processing time and/or damage to a substrate.

Method of treating and removing a photoresist pattern and method of manufacturing a semiconductor device using the same

Cleaning solutions for integrated circuit devices and methods of cleaning integrated circuit devices using the same are disclosed. The cleaning solution includes about 30% aqueous ammonia solution, acetic acid by a volume percent higher then a volume percent of the aqueous ammonia solution, and deionized water by a volume percent higher then the volume percent of the acetic acid. Additionally, disclosed are methods wherein the cleaning solution is formed on integrated circuit substrates having an exposed metal pattern formed thereon, and further providing mega-sonic energy to the film of the cleaning solution.

Cleaning solution including aqueous ammonia solution, acetic acid and deionized water for integrated circuit devices and methods of cleaning integrated circuit devices using the same

In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Cleaning solution and method of cleaning a semiconductor device using the same

A method of forming a self-aligned contact pad for use in a semiconductor device, including: forming a gate having a gate mask formed thereon on a semiconductor substrate, the semiconductor substrate including an active region and a non-active region, forming a spacer on both sidewalls of the gate and the gate mask, forming an interlayer insulating layer over the entire surface of the semiconductor substrate, the interlayer insulating layer including an opening formed on the active region of the semiconductor substrate, forming a conductive material layer over the entire surface of the semiconductor substrate to cover the interlayer insulating layer, etching-back the conductive material layer until the interlayer insulating layer is exposed, and performing a multi-step CMP process to form contact pads in the opening of the interlayer insulating layer, such that the contact pads are electrically insulated from each other.

Method of forming a self-aligned contact pad for use in a semiconductor device

A method for manufacturing a cylindrical storage electrode of a semiconductor device includes forming a contact pad to be connected to an active region of a semiconductor substrate in an interlayer insulator film on the semiconductor substrate. Then, a silicon nitride layer as an etching stop layer is formed on the contact pad. Next, an insulating layer is formed on the silicon nitride layer. A portion of the surface of the silicon nitride layer is exposed by partially removing the insulating layer. Then, the exposed portion of the silicon nitride layer is removed using a wet etching process using a predetermined etchant to expose the surface of the contact pad. A conductive layer for a storage electrode is formed on the insulating layer and the surface of the exposed contact pad. Finally, a cylindrical storage electrode is completed by removing the upper portion of the conductive layer for a storage electrode, the insulating layer and the silicon nitride layer.

Growing community of inventors

Seongnam-si, South Korea

Dae-Hyuk Chung