Samsung Electronics Co., Ltd.

Dae-Hun Choi

Myoungbum Lee

JinGyun Kim

Myoung-Bum Lee

Bo-Young Lee

Seung-Yup Lee

Yeon-Sil Sohn

Kyung-Tae Jang

Jong-Wan Choi

Seungmok Shin

Methods of manufacturing a three-dimensional semiconductor device are provided. The method includes: forming a thin film structure, where first and second material layers of at least 2n (n is an integer more than 2) are alternately and repeatedly stacked, on a substrate; wherein the first material layer applies a stress in a range of about 0.1&#xd7;109 dyne/cmto about 10&#xd7;109 dyne/cmto the substrate and the second material layer applies a stress in a range of about &#x2212;0.1&#xd7;109 dyne/cmto about &#x2212;10&#xd7;109 dyne/cmto the substrate.

Methods of manufacturing three-dimensional semiconductor memory devices

Methods of forming semiconductor devices including vertical channels and semiconductor devices formed using such methods are provided. The methods may include forming a stack including a plurality of insulating patterns alternating with a plurality of conductive patterns on an upper surface of a substrate and forming a hole through the stack. The hole may expose sidewalls of the plurality of insulating patterns and the plurality of conductive patterns. The sidewalls of the plurality of insulating patterns may be aligned along a first plane that is slanted with respect to the upper surface of the substrate, and midpoints of the respective sidewalls of the plurality of conductive patterns may be aligned along a second plane that is substantially perpendicular to the upper surface of the substrate.

Methods of forming semiconductor devices including vertical channels and semiconductor devices formed using such methods

Growing community of inventors

Yongin-si, South Korea

Dae-Hun Choi