Hynix Semiconductor Inc.

Dae Hee Weon

Tae Kyun Kim

Seok Kiu Lee

A method for fabricating a MOSFET device having a metal gate with an ultra shallow junction and allowing the application of a self-aligned contact. A sacrificial gate is formed on a silicon substrate, as is a first silicon epitaxial layer, which is thinner than the sacrificial gate. Elevated source/drain regions are formed on the silicon substrate by implanting desired impurity ions. An interlayer insulating film is deposited over the resultant structure and polished to expose the sacrificial gate. A groove is formed in which a gate insulating film and a metal film are deposited. The metal film, the gate insulating film and the interlayer insulating film are polished until the first silicon epitaxial layer is exposed. A second silicon epitaxial layer is then formed on the first silicon epitaxial layer.

Method for fabricating MOSFET device

A method of manufacturing a semiconductor device having the steps of forming an insulating layer on a silicon substrate, forming a contact hole on the insulating layer, forming a selective silicon layer in the contact hole, and forming a selective conductive plug on the selective silicon layer.

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Kyoungki-do, South Korea

Dae Hee Weon