Skhynix Inc.

Dae Geun Jee

Joung Young Lee

Yeong Sik Yi

Jae Han Park

Hyun Ju Lee

Kwang Jong Song

A semiconductor integrated apparatus includes a plurality of functional blocks configured by electronic devices; and a processor configured to control the plurality of functional blocks, select voltage trim values of the respective functional blocks based on a level of input power supplied during a power-on operation, and provide the voltage trim values to the plurality of functional blocks, respectively.

Semiconductor integrated apparatus, operating method thereof and data processing apparatus including the same

A data storage device includes a nonvolatile memory device and a controller including a command parser configured to match a clock corresponding to each of a plurality of memory access types to generate a clock index matched with each of the memory access types and configured to determine, when a command is received, a memory access type of the command and the clock index matched with the determined memory access type by analyzing the command, and a memory interface configured to determine a locking value and the clock index corresponding to each of a plurality of clocks having different frequencies and change the locking value for processing of a command according to the clock index determined by the command parser.

Data storage device and operating method thereof

There are provided a memory system and an operating method thereof. A memory system includes: a nonvolatile memory device that operates in response to a plurality of internal commands received thereby; and a memory controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a processing completion bitmap index corresponding to the plurality of queued internal commands.

Memory system and operating method thereof

There are provided a memory system and an operating method thereof. A memory system includes: a semiconductor memory device for including a plurality of semiconductor memories, and operating in response to a plurality of internal commands received thereto; and a controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a master bitmap including information on unperformed operations that are not performed in the semiconductor memory device for internal commands among the plurality of queued internal commands. The controller generates a flush bitmap corresponding to a flush command, using a current master bitmap, when the flush command is received from the host, and clears the flush bitmap if the semiconductor memory device completes the unperformed operations.

A semiconductor device includes a nonvolatile memory storing encrypted management data, and a memory controller coupled between the nonvolatile memory and a host. The memory controller is allocated a free area in a host memory from the host and is suitable for storing the encrypted management data in the free area.

Memory controller communicating with host, operating method thereof, and computing system including the same

A semiconductor device includes a buffer memory, a plurality of function blocks, each of which transmits to a request of access to the buffer memory, and accesses the buffer memory according to a response to the request of access; and a buffer management unit suitable for receiving the request of access, and transmitting the response to the request of access according to a status of the buffer memory, wherein the buffer management unit and each of the plurality of function blocks may communicate through a dedicated channel.

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Gyeonggi-do, South Korea

Dae Geun Jee