Boe Technology Group Co., Ltd.

Hefei Boe Joint Technology Co., Ltd.

Huawei Technologies Co., Limited

Beijing Boe Technology Development Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Peking University

Huawei Technologies,co., Ltd.

Boe Technology Groupco., Ltd.

Yunnan Invensight Optoelectronics Technology Co., Ltd.

Yannan Invensight Optoelectronics Technology Co., Ltd.

Dacheng Zhang

Yongqian Li

Zhidong Yuan

Lang Liu

Pengcheng Lu

Meng Li

Can Yuan

Xiaochuan Chen

Li Liu

Pan Xu

Yunlong Li

Zhongyuan Wu

Kuanta Huang

Xing Zhang

Shengji Yang

Chen Hui Xu

Guoying Wang

Yuanlan Tian

Xuehuan Feng

Ying Han

Kui Zhang

Yicheng Lin

Jingquan Wang

Zhan Gao

Rongrong Shi

Zhijian Zhu

Junbo Wei

Xue Dong

Wei Wang

Wenqing Zhao

Can Wang

Dongsheng Li

Liangchen Yan

Xiaochen Niu

Hui Tong

Qinghe Wang

Xinwei Gao

Jian Gao

Yu Wang

Ming Yang

Hui Wang

Qian Wang

Jifeng Tan

Can Zhang

Xiandong Meng

Xianqin Meng

Cheng Xu

Bin Zhou

Ning Liu

Yi Chen

Yafeng Yang

Zhongxiao Li

Xinli Ma

Haiyan Wang

Chenyu Chen

Chao Yang

Xiaohu Xu

Wenchu Dong

Chong Zhou

Jun Liu

Yuchen Wang

Shi Sun

Jian Meng

Wei Liu

Peng Liu

Li Ni Zhang

Ying Wang

Yang Zhang

Dongfang Wang

Yongda Ma

Jie Zhang

Xueguang Hao

Jun Cheng

Qing Fa Wang

Ling Wang

Tiankuo Shi

Xiaomang Zhang

Tongshang Su

Chengyuan Luo

Yan Sun

Guang Yan

Yanan Niu

Leilei Cheng

Jingbo Xu

Yanming Wang

Ting Li

Qing Bo Wang

Qian Wu

Yongchao Huang

Weilin Lai

Yucheng Chan

Yue Hu

Chunmiao Zhou

Dongfang Yang

Dongxu Han

Xiaobin Shen

Haixia Xu

Fang Yang

Dachao Li

Longfei Fan

A display substrate and a display apparatus are provided. The display substrate includes a first conductive structure including a first surface and a third surface that are opposite and a second surface and a fourth surface that are opposite. The first surface and the second surface respectively have different angles with a plate surface of the base substrate. The first surface and the second surface are respectively provided with a first surface microstructure and a second surface microstructure; the first cross section has a first orthogonal projection on the third surface, and a length of the first orthogonal projection is less than a length of the first surface microstructure in the first cross section; the second cross section has a second orthogonal projection on the fourth surface, and a length of the second orthogonal projection is less than a length of the second surface microstructure in the second cross section.

Display substrate and display apparatus

A display substrate, comprising: a plurality of first electrodes having a planar middle part which are located on a planarization layer of a driving backplane, a spacing groove exposing a planar surface of the planarization layer being provided between two adjacent first electrodes; an electric leakage blocking layer located on a first electrode layer and located between two adjacent first electrodes, the electric leakage blocking layer being provided with a blocking groove corresponding to the spacing groove and exposing the planar surface of the planarization layer, and the electric leakage blocking layer being overlapped on the surface of the middle part on at least one side; and a light-emitting functional layer located at the side of the electric leakage blocking layer and the first electrode layer away from the driving backplane.

Display substrate having spacing groove and manufacturing method therefor, and display device having spacing groove

Provided are a display substrate and a display device. The display substrate includes a base substrate, and gate lines extending in a first direction, data lines extending in a second direction and pixel units that are on the base substrate, the first direction intersecting the second direction; each pixel unit including sub-pixels, each sub-pixel including a pixel circuit; the pixel circuit including at least a switching transistor, a drive transistor, a sensing transistor, and a storage capacitor; for each pixel circuit, the switching transistor, the drive transistor, and the sensing transistor therein are all on a same side of the storage capacitor; the switching transistor is at an intersection of the gate line and the data line connected thereto, and the switching transistor is adjacent to the sensing transistor in the first direction and adjacent to the drive transistor in the second direction.

Display substrate and display device

A display device, a display panel, and a manufacturing method thereof are proposed. The display panel includes a substrate, a first insulation layer, a first electrode layer, a pixel definition layer, a light-emitting function layer and a second electrode.

Display device, display panel and manufacturing method thereof

Provided is a display panel, including: a substrate provided with a display region and a non-display region disposed at a periphery of the display region; a plurality of first power signal lines and a plurality of drive signal lines that are disposed in the display region; and a power connection bus, a plurality of first fan-out leads, and a plurality of second fan-out leads that are disposed in the non-display region, wherein the power connection bus is electrically connected to the first power signal line and the first fan-out lead respectively; the plurality of second fan-out leads are electrically connected to the plurality of drive signal lines in a one-to-one correspondence; each first fan-out lead is disposed between every two adjacent second fan-out leads; and the plurality of first fan-out leads and the plurality of second fan-out leads are both configured to be electrically connected to a driving chip.

Display panel, method for manufacturing the same and display device

A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.

A display panel and a display device are provided, the display panel has a display region, a dummy pixel region and a circuit region, the display region includes a planarization layer and an encapsulation layer. The circuit region includes a plurality of wires and a frame sealant. The frame sealant overlaps with at least a part of the wires, the encapsulation layer overlaps with at least a part of the frame sealant. The planarization layer includes at least one groove in the circuit region, and overlapping with at least a part of the wires. A first side and a second side of the display region include a binding region, and at least one first chip-on-film in the first binding region on the first side and at least one second chip-on-film in the second binding region on the second side are centrosymmetric with respect to a center of the display region.

Display panel and display device

A display device and method for manufacturing the same. The display device includes an anode layer, hole injection layer, hole transport layer, light-emitting material layer, electron transport layer, electron injection layer and cathode layer arranged in sequence. The electron injection layer includes at least one electron injection layer. At least one high impedance layer is further arranged between at least one of the electron injection layers and the cathode layer. The resistivity of the electron injection layer and resistivity of the cathode layer are both smaller than the resistivity of the high impedance layer. The display device and the method for manufacturing the same can solve the problem of short circuit between cathode and anode of the display device caused by particles, significantly reduce the number of dark spots on the panel of the display device, and improve the panel yield of the display device.

Display device and method for manufacture the same

Provided are an array substrate, a display panel, a display apparatus and a method for manufacturing an array substrate. The array substrate includes: a base substrate; an active layer, which is located on one side of the base substrate, where the active layer includes a channel region, a conductive source region, which is located on one side of the channel region, and a conductive drain region, which is located on the other side of the channel region; and a metal layer, which is located on the side of the active layer that is away from the base substrate, where the metal layer includes a gate electrode and a signal line, which are arranged on the same layer, and the thickness of the gate electrode perpendicular to the base substrate is less than the thickness of the signal line perpendicular to the base substrate.

Array substrate, display panel, display apparatus, and method for manufacturing array substrate

The present disclosure relates to a display device, including: a driving backplane, including a substrate, at least one wiring layer and a planarization layer, wherein the planarization layer is provided with a groove; a first electrode layer, disposed on a surface of the planarization layer away from the substrate, and including a plurality of first electrodes distributed at intervals; a pixel definition layer, disposed on the surface of the planarization layer away from the substrate, wherein a separation groove is formed by the pixel definition layer at the groove; a conductive shielding layer, at least partially disposed in the groove; a light-emitting layer, by which the pixel definition layer, the first electrodes and the conductive shielding layer are covered, wherein the light-emitting layer is recessed at the separation groove and is in direct contact with at least a partial area of the conductive shielding layer.

The present disclosure provides a signal selection circuit and a signal selection method of a display panel, and a display device. The display panel has N regions and includes pixel driving circuits and M gate driving circuits for providing M gate driving signals to the pixel driving circuits; each gate driving circuit includes N gate driving sub-circuits, each of which is configured to provide one gate driving signal to the pixel driving circuits in one region; M≥2, N≥2, and M and N are integers; the signal selection circuit includes: M frame start signal lines, each of which is configured to provide a frame start signal for one gate driving circuit; and a selection sub-circuit configured to output frame start signals written by the frame start signal lines to the gate driving sub-circuits corresponding to the regions of the display panel according to a preset sequence.

Signal selection circuit and method of display panel, and display device

The present disclosure provides shift register unit, including: sensing control circuit connected to sensing signal input terminal, random signal input terminal, and sensing control node, and configured to write signal provided by sensing signal input terminal to sensing control node in response to active level signal provided by random signal input terminal; first sensing input circuit connected to clock control signal input terminal, sensing control node, and first pull-up node, and configured to write signal provided by clock control signal input terminal to first pull-up node only in response to active level signal at sensing control node; and first driving output circuit connected to first pull-up node, first driving clock signal input terminal, and first driving signal output terminal, and configured to write signal provided by first driving clock signal input terminal to first driving signal output terminal in response to active level signal at first pull-up node.

Shift register unit, gate driving circuit, and gate driving method

Provided is a display panel. The display panel includes: a base substrate, including a display region and a peripheral region adjacent to the display region; a first power trace, disposed in the peripheral region and on a side of the base substrate; a connecting trace, disposed in the peripheral region and on a side of the base substrate; a plurality of signal lines, disposed in the display region and the peripheral region; an insulating layer, disposed in the display region and the peripheral region; and a cathode layer, disposed in the display region and the peripheral region.

A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of sensing signal lines. The base substrate includes a display region including repeating units arranged in array, each repeating unit includes a transparent region and a pixel region arranged in a first direction. Two lines of repeating units are provided between adjacent two of the plurality of sensing signal lines, the two lines of repeating units extend along a second direction, and each of the plurality of sensing signal lines is connected with sub-pixel driving circuits of the plurality of sub-pixels of two lines of repeating units which are adjacent to the each of the plurality of sensing signal lines and extend along the second direction, and is configured to provide a reference voltage signal. The display substrate reduces the space occupied by the signal lines and improves the light transmittance.

The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate of the present disclosure has a display region, and includes a base and a plurality of data lines and a plurality of fan-out traces on the base; each of the plurality of data lines is connected to a corresponding one of the plurality of fan-out traces at a connection node in the display region; and at least one of the plurality of data lines is connected to a corresponding fan-out trace at a plurality of connection nodes.

Growing community of inventors

Beijing, China

Dacheng Zhang