Northrop Grumman Systems Corporation

Cyrus Dhalla

Gerald R Fischer

Michael S Munoz

Scott M Takahashi

Zoltan Zvi Stroll

Douglas S Cockfield

Michael Steven Muñoz

Jonathan Krauss

Akop Gazdzhyan

Michael Steven Mu&ntilde;oz

An embodiment generates a composite high speed clock with embedded frame synchronization using simple digital encoding of a high speed reference clock. The high speed reference clock and self-aligned frame synchronization signal are recovered by standard logic gate circuitry. The encoding and decoding circuits are comprised of basic digital logic gates with low propagation delay skew and timing jitter. The encoded clock is easier to transmit from source unit to destination unit over common transmission media (i.e., digital transceivers, amplifiers, splitters, connectors and coaxial cable) because only a single interface is required and because the encoding scheme reduces the composite clock to a minimal transmission bandwidth with constrained waveform harmonic content, relative to a low frequency frame sync with fast rise time that requires a broadband transmission media.

Clock and frame synchronization carried as a single composite signal allows the use of a single transmission line with a narrower bandwidth

A filterbank system is provided for reordering subbands of a wideband digital signal. The filterbank system extracts the subbands from a wideband digital input signal into an even channel number group of even channel number subbands and an odd channel number group of odd channel number subbands. The separation of even and odd channel number subbands provides an even channel grouping with guard bands between the even channel number subbands and an odd channel number grouping with guard bands between the odd channel number subbands. The filterbank system then reorders the even channel number subbands and the odd channel number subbands. The reordered subbands are then combined by combining the reordered even channel number subbands and odd channel number subbands into a wideband digital output signal.

Efficient and flexible oversampled filterbank with near perfect reconstruction constraint

A digital automatic level control system employs delay elements, which enable information about a signal parameter from the past, present and future to be processed to provide an optimal gain that can be used to level rapidly varying signals, such as bursty signals. As digital time samples of a signal are passed through first and second buffers, first and second accumulators maintain running sums that are related to the sum of the samples presently in the first and second buffers, respectively. The sums in the first and second accumulators represent information about the signal parameter for the future and the past, respectively. By choosing the maximum of these two values, the system can anticipate the beginning of a signal burst, and still have enough delay to compensate the end of a signal burst. In one embodiment of the invention, multiple channel signals can be leveled, either individually or in groups.

Digital automatic level control system

A system and method is provided for efficient analog reconstruction of a digital signal to an intermediate frequency (IF). The digital signal can be a complex baseband digital signal that is sourced from a near perfect reconstruction filterbank (NPRFB). The output of the NPRFB, after some manipulation in the digital domain, is converted to the analog domain at IF. The IF analog signal can then be modulated with a high frequency RF signal or further mixed with a RF transmission frequency signal for RF transmission.

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Redondo Beach, CA, United States of America

Cyrus Dhalla