International Business Machines Corporation

Globalfoundries Inc.

Elpis Technologies Inc.

Tessera LLC

Cyril Cabral, Jr

Christian Lavoie

Kenneth Parker Rodbell

Lawrence Alfred Clevenger

Vijay Narayanan

Rajarao Jammy

Kevin K Chan

Martin Michael Frank

Katherine Lynn Saenger

Daniel C Edelstein

Guy M Cohen

Alfred Grill

Evgeni Petrovich Gousev

Vamsi Krishna Paruchuri

Michael S Gordon

Stephen Mark Rossnagel

Clement Hsingjen Wann

Yun Yu Wang

Hariklia Deligianni

Supratik Guha

Eduard Albert Cartier

Eric Andrew Joseph

Matthew Warren Copel

Keith Kwong Hon Wong

Takeshi Nogami

Jack Oon Chu

Conal Eugene Murray

Paul Michael Solomon

Emanuel Israel Cooper

Ghavam G Shahidi

Oleg Gluschenkov

Zhijiong Luo

Louis Lu-Chen Hsu

Thomas M Shaw

Hiroyuki Miyazoe

James Spiros Nakos

Fenton Read McFeely

Anthony K Stamper

Jeffrey P Gambino

Huilong Zhu

Cyprian Emeka Uzoh

Arne Watson Ballantine

Kirk David Peterson

Sandra Guy Malhotra

John Michael Cotte

Xiao Hu Liu

Deborah A Neumayer

Robert L Wisnieff

Paul Charles Jamison

Kwong Hon Wong

Juntao Li

Louis L Hsu

John J Ellis-Monaghan

Josephine B Chang

Michael A Guillorn

Christopher Vincent Jahnes

Paul Stephen Andry

Omer H Dokumaci

Steven John Koester

Yun-Yu Wang

Randy William Mann

Anna Wanda Topol

Bruce Bennett Doris

Veeraraghavan S Basker

Evan G Colgan

Ying Di Zhang

Qinghuang Lin

Eugene John O'Sullivan

Brian Joseph Greene

Renee Tong Mo

Wilbur David Pricer

Fuad Elias Doany

Sufi Zafar

Peilin Song

Daniel Sanders

John Maxwell Cohn

Franco Stellari

Dae-Gyu Park

Robert L Bruce

William Joseph Murphy

Chun-Yung Sung

Mahadevaiyer Krishnan

Charles Thomas Black

Takashi Ando

Ramachandra Divakaruni

Paul Raymond Besser

Timothy Joseph Dalton

Michael Patrick Chudzik

Jeng-Bang Yau

Shreesh Narasimha

Andrew Herbert Simon

Kim Yang Lee

Dirk Pfeiffer

Terry Allen Spooner

Satyanarayana Venkata Nitta

Frank Robert Libsch

Meikei Ieong

Harold John Hovel

Anirban Basu

K Paul Muller

Interconnect structures containing metal oxide embedded diffusion barriers and methods of forming the same. Interconnect structures may include an Mlevel including an Mmetal in an Mdielectric, an Mlevel above the Mlevel including an Mmetal in an Mdielectric, an embedded diffusion barrier adjacent to the Mdielectric; and a seed alloy region adjacent to the Mmetal separating the Mmetal from the Mmetal. The embedded diffusion barrier may include a barrier-forming material such as manganese, aluminum, titanium, or some combination thereof. The seed alloy region may include a seed material such as cobalt, ruthenium, or some combination thereof.

Self-forming embedded diffusion barriers

Circuit board inspection by receiving a near infrared (NIR) image of at least a portion of a circuit board, analyzing the NIR image using a machine learning model, and detecting anomalous circuit board portions according to the analysis.

Machine learning-based circuit board inspection

Methods and systems for locating a filament in a resistive memory device are described. In an example, a device can acquire an image indicating an occurrence of photoemission from the resistive memory device. The device can determine a location of the filament in a switching medium of the resistive memory device using the acquired image.

RRAM filament location based on NIR emission

A reactive material erasure element comprising a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.

Integrated reactive material erasure element with phase change memory

A silicon chip carrier includes at least two of a photosensitive P-I-N diode, a non-photosensitive P-I-N diode, a photosensitive P-(metal)-N diode, a non-photosensitive P-(metal)-N diode, and a Schottky diode all integrally formed in the same layers of the chip carrier. In some embodiments, diodes formed in the chip carrier provide photovoltaic power and power regulation to a circuit mounted on the chip carrier.

Chip carrier integrating power harvesting and regulation diodes and fabrication thereof

A method comprising bonding a first substrate to a second substrate. The first substrate includes a layer of one or more pairs of reactive material. The method comprising triggering a reaction between the one or more pairs of reactive material and fragmenting the second substrate.

Fragmenting computer chips

The present disclosure relates to integrated circuits and to methods of manufacturing interconnects of integrated circuits. For example, an integrated circuit includes a surface of the integrated circuit and an interconnect formed on the surface and comprising a metal. An average grain size of the metal of the interconnect is greater than or equal to at least half of a line width of the interconnect. In another example, a method for manufacturing an interconnect of an integrated circuit includes depositing a layer of a metal onto a surface of the integrated circuit, annealing the metal, patterning a first hard mask for placement over the metal and forming a line of the interconnect and a first via of the interconnect by performing a timed etch of the metal using the first hard mask.

Thin film interconnects with large grains

A reactive material erasure element including a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.

Systems and methods are provided for implementing a crystal oscillator to monitor and control semiconductor fabrication processes. More specifically, a method is provided for that includes performing at least one semiconductor fabrication process on a material of an integrated circuit (IC) disposed within a processing chamber. The method further includes monitoring by at least one electronic oscillator disposed within the processing chamber for the presence or absence of a predetermined substance generated by the at least one semiconductor fabrication process. The method further includes controlling the at least one semiconductor fabrication process based on the presence or absence of the predetermined substance detected by the at least one electronic oscillator.

Crystal oscillator and the use thereof in semiconductor fabrication

Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated circuit is provided having reactive material capable of being activated by electrical discharge, without requiring a battery or similar external power source, to produce an exothermic reaction that erases and/or destroys one or more semiconductor devices on the integrated circuit.

Activating reactions in integrated circuits through electrical discharge

A reactive material stack with tunable ignition temperatures is provided by inserting a barrier layer between layers of reactive materials. The barrier layer prevents the interdiffusion of the reactive materials, thus a reaction between reactive materials only occurs at an elevated ignition temperature when a certain energy threshold is reached.

Energy release using tunable reactive materials

An integrated circuit structure and formation thereof. The integrated circuit structure includes a substrate and a front-end-of-the-line (FEOL) portion. The FEOL portion rests on top of and in contact with the substrate. The integrated circuit structure includes a memory level portion. The memory level portion rests on top of and in contact with the FEOL portion. The integrated circuit structure includes a back-end-of-the-line (BEOL) portion. The BEOL portion rests on top of and in contact with the memory level portion. The integrated circuit structure includes a multiple layer that includes one or more pairs of reactive materials. The multiple layer is one or more of: i) on top of the BEOL portion; ii) within the BEOL portion; iii) within the memory level portion; iv) within the FEOL portion; v) embedded in the substrate; and vi) on bottom of a thinned substrate.

Damaging integrated circuit components

Growing community of inventors

Mahopac, NY, United States of America

Cyril Cabral, Jr