International Business Machines Corporation

Cynthia Susan Milkovich

Mark Vincent Pierson

Miguel Angel Jimarez

Michael A Gaynes

Eric A Johnson

Jerzy Maria Zalesinski

Lawrence Richard Cutting

Jeffrey S Perkins

Voya Rista Markovich

Charles Hampton Perry

Lisa Jeanine Jimarez

Brenda Lee Peterson

Steven E Poetzinger

Charles Gerard Woychik

Hormazdyar M Dalal

Son K Tran

Kenneth Michael Fallon

Gene J Gaudenzi

Steven Eugene Poetzinger

An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.

Method of making an electronic package

An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.

Flip chip C4 extension structure and process

An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a conductive structure that couples a first substrate to a second substrate. The first substrate may include a chip or a module. The second substrate may include a chip carrier or a circuit card. Thus, the present invention encompasses such coupling as chip to chip carrier, chip to circuit card, and module to circuit card. The conductive structure includes a first conductive body and a second conductive body. The first conductive body is attached to the first substrate and the second conductive body is attached to the second substrate. The first conductive body may include a solder bump, while the second conductive body may include a eutectic alloy, such as a eutectic alloy lead and tin. Alternatively, the second conductive body may include a non-eutectic alloy whose melting point is below the melting point of the first conductive body. A portion of the first conductive body is coated with a material that is nonsolderable and nonconductive. The melting point of the first conductive body is higher than the melting point of the second conductive body. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated surface of the first conductive body. The adhesive coupling results from application of a temperature that lies between the melting points of the first and second conductive bodies.

A multilayer CTE compensated chip interposer for connecting a semiconductor chip to a laminate chip carrier. A first dielectric layer, on the chip side of the interposer, is made of a stiff, high elastic modulus, material, such as a ceramic material, with a CTE closely matching the CTE of the chip. A second dielectric layer, on the laminate chip carrier side of the interposer, is made of resilient, low elastic modulus, material with metallurgy formed thereon, such as circuit board material, with a composite CTE closely matching the CTE of said chip carrier. A third dielectric intermediate layer, laminated between said first and second layers, is made of a low elastic modulus material with metallurgy formed thereon, such as a Teflon/glass particle material, with a composite CTE between the CTEs of said first and second layers.

Method of making a CTE compensated chip interposer

Compliant layer for encapsulated columns

CTE compensated chip interposer

Solder bumps on electronic components are encapsulated before attachment to a substrate or component carrier. A film of sealing material is pressed against top portions of the solder bumps by pressing with a layer of low durometer flexible material. Encapsulant is positioned between the component and the film and in contact with the bumps, and partially cured. The film and layer of flexible material are removed to expose the top portions of the encapsulated solder bumps.

Encapsulation of solder bumps and solder connections

A screen printing fixture holds a flexible circuit board having components attached to one side, to allow screening a pattern of solder paste onto the second side for subsequent attachment of components to that side. In an electronic package assembly a flexible circuit board with components is wound about a heat spreader assembly having a cavity so that at least one component on the flexible circuit board is positioned within the cavity and in thermal connection to the heat spreader.

Electronic package assembly

A multi-layer flexible circuit board has thicker regions to which surface-mount-technology (SMT) components (such as flip chips and QFPs) and pin-in-hole (PIH) components are mounted on both sides and which contains conductive through vias between wiring layers. After the SMT components have been mounted to the first side, a screening fixture with a support surface that has cavities conforming the components on the first side, is used to screen solder paste to the other side of the board. The thicker regions are surrounded by thinner regions of the board with fewer wiring layers and preferably fewer or thinner dielectric layers, and which can be bent along a line without bending the thicker regions. A common heat spreader plate with cavities or holes for multiple components is laminated to the thicker regions on one side of the board. The thicker regions have windows in which wire-bond chips are mounted to the heat spreader and the chips are wirebonded to the other side of the board. A thermally conductive adhesive or grease connects between the components and the bottoms of the cavities. Two heat sink plates are bolted together and along with other such heat sink plates are bolted to an enclosure frame to improve thermal performance.

Flexible circuit board and common heat spreader assembly

A screen printing machine comprising a backing plate with holes conforming to components attached to the surface of a flexible circuit board. The machine includes a screen which patterns solder paste on the surface of the circuit board while the circuit board is on the backing plate. Also included is a spring loaded element disposed adjacent to the backing plate which applies a predetermined continuous force to the four corners of the circuit board. This force is applied in a diagonal direction to the corners to stretch the circuit board so that the circuit board is parallel to the backing plate during screening.

Manufacturing flexible circuit board assemblies and printer for

A structure and method is disclosed for directly attaching a device or package on flexible organic circuit carriers having low cost and high reliability. IC chips with a new solder interconnect structure, comprised of a layer of pure tin, deposited on the top of high melting Pb--Sn solder balls are employed for joining. These methods, techniques and metallurgical structures enables direct attachment of electronic devices of any complexity to any substrate and to any level of packaging hierarchy. Also, devices or packages having other joining technologies, eg. SMT, BGA, TBGA, etc. could be joined onto the flexible circuit carrier.

Method for attaching a flip chip on flexible circuit carrier using chip

A multi-layer flexible circuit board has multiple thicker regions to which components are mounted and thinner, more flexible regions with fewer wiring layers through which the board can be bent about a line without bending thicker regions. Surface mount components such as QFP's and flip-chips are mounted on the front side, and surface mount and pin-in-hole components are mounted on the back side of the circuit board at the thick regions. Heat spreaders are laminated to the back sides of thicker regions. The thicker regions have windows in which wire bond chips are mounted on the heat spreader and wire bonded to the front side of the board. A thermally conductive adhesive or grease connects between the tops of the back side components and the bottoms of the cavities. The heat sinks are bolted together and/or to an enclosure frame to improve thermal performance.

Growing community of inventors

Vestal, NY, United States of America

Cynthia Susan Milkovich