Qualcomm Incorporated

Sun Microsystems, Inc.

Curtis Roger McAllister

Syrus Ziai

Peng Zou

Gang Ren

David J Greenhill

James Laudon

Thomas R Caron

Shanker Bhagvat

A semiconductor device has a power rail that provides a rail voltage. The power rail is electrically coupled to a plurality of voltage regulators, and each voltage regulator includes an output interface electrically coupled to the power rail, and a first drive path and a second drive path both coupled to the output interface, and an intra-regulator balancing circuit. The first and second drive paths are coupled in parallel with each other, and operate during a first phase and a second phase, at an operating frequency, to provide a first path current and a second path current to the power rail, respectively. The intra-regulator balancing circuit senses the first and second path currents and controls a first duty cycle of the first phase and/or a second duty cycle of the second phase based on a difference of the first and second path currents.

Current balancing for voltage regulator units in field programmable arrays

A semiconductor device includes a plurality of voltage regulators arranged in a field programmable array and a power array controller coupled to the plurality of voltage regulators. The power array controller is configured to control the plurality of voltage regulators to output power to a plurality of power rails. Each power rail provides a respective rail current at a respective rail voltage. The power array controller is configured to for each of the plurality of power rails, determine the respective rail current associated with the respective power rail, select a subset of voltage regulators according to at least the respective rail current, and enable the subset of voltage regulators to generate the respective rail voltage and provide the respective rail current collectively.

Power management integrated circuit with a field programmable array of voltage regulators

An integrated circuit test system. The test system includes a controller and an integrated circuit coupled to a voltage source and a current monitor. The controller causes the voltage source to supply a voltage to the integrated circuit, receives a signal from the current monitor indicating a power dissipation of the integrated circuit, and causes the voltage source to reduce the voltage until the signal from the current monitor indicates the power dissipation of the integrated circuit is less than a predetermined threshold. The controller stores in the integrated circuit in a non-volatile storage register that is accessible via a subset of access pins, a value corresponding to the voltage supplied to the integrated circuit when the power dissipation of the integrated circuit is less than the predetermined threshold. The subset of access pins provides at least one function in addition to accessing the non-volatile storage register.

Method and apparatus for setting VDD on a per chip basis

A system is provided for detecting when a temperature of a multiprocessor chip approaches an established threshold temperature indicating an imminent overheat condition. When the threshold temperature is reached, a number of active threads are idled in order to remove their contribution from the overall power consumption of the multiprocessor chip. Idling of the threads serves to prevent the multiprocessor chip from reaching the overheat condition. Once the temperature of the multiprocessor chip drops to an acceptable level, execution of the previously idled threads is resumed. Detection of the imminent overheat condition and corresponding idling of the threads to avoid reaching the overheat condition is conducted by hardware to ensure timely reduction of the multiprocessor chip temperature.

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Los Altos, CA, United States of America

Curtis Roger McAllister