Finisar Corporation

Fairchild Semiconductor Corporation

Sgs-Thomson Microelectronics Limited

Curtis Robinson

Francesco Carobolante

Lucy G Hosking

David W Ritter

Henry Meyer Daghighian

Robert David Zucker

Gerard E Taylor

An integrated circuit may include a signal generator configured to generate a switching signal and a switching unit coupled to the signal generator. The switching unit may be configured to generate a pulsed current based on the switching signal using a first voltage. The integrated circuit may also include an inductive unit coupled to the switching unit. The inductive unit may be configured to receive the pulsed current and to generate a second voltage different from the first voltage.

Integrated circuit with voltage conversion

A method and apparatus for compensating for time base or phase errors in video and audio signals that are separately stored or processed. A ring oscillator provides a plurality of clock signals, each having a same frequency and slightly different phase. Each of the clock signals is applied to a multiplexor for allowing an appropriate one of the clock signals to be selected. By selecting appropriate ones of the clock signals in a sequence, the frequency and phase of an output clock signal formed by the multiplexor can be continuously and precisely controlled. Sync pulses separated from a video signal having a varying time base are applied to a video timing generator circuit which generates a series of digital values representative of timing differences between an expected occurrence of a sync pulse and an actual occurrence of the sync pulse. A phase accumulator accumulates the digital values over time for generating appropriate addresses for the multiplexor. Therefore, the frequency and phase of the output clock signal is controlled according to the phase of the sync pulses. Additional logic circuits coupled to the video timing generator generate a series of digital values representing a sinusoid having a stable time base, but which is clocked according to the output clock signal. This sinusoid can be utilized to demodulate a chrominance component signal stored according to the &ldquo;color under&rdquo; format. The output clock signal can be utilized for separately processing video and associated audio signals while maintaining time base relationships among the signals.

Jitter cancellation technique for video clock recovery circuitry

A method and circuit for implementing a frequency lock loop circuit in a disk drive is disclosed. The circuit includes the motor control elements of a direct current motor plus a coarse counter, a fine counter, and a digital to analog converter. The coarse counter is used to count down from a programmed coarse count. The fine counter begins to count down from a fine count when the coarse counter reaches zero. The count in the fine counter, when a zero crossing occurs, represents the difference between the expected period and the actual period and is loaded into a digital to analog converter which converts the difference to an analog voltage which is used by the coil drive circuit to either speed up or slow down the motor. The digital to analog conversion may be realized by a charge pump circuit.

Circuit and method for controlling the speed of a motor

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Sunnyvale, CA, United States of America

Curtis Robinson